Two-stage LNA with good linearity

Details Two-stage LNA with good linearity Two-stage LNA with good linearity

2000-09-22

2002-06-18

Mottola, Steven J. (Department: 2817)

Amplifiers

With semiconductor amplifying device

Including frequency-responsive means in the signal...

C330S311000

Reexamination Certificate

active

06407640

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to Low Noise Amplifiers (LNAs) and has particular relation to LNAs which are highly linear.
2. Background Art
In wireless applications it is important to constrain power consumption. At the same time, the operating environment often dictates very high performance for the RF front-end. This is particularly accentuated in the case of CDMA systems, because they operate full-duplex (i.e. receiving and transmitting at the same time). It can be shown that, simultaneously with a low noise figure, the LNA must also have very high IIP
3
. See, for example, V. Aparin, B. Butler, Paul Draxler, “Cross Modulation Distortion in CDMA Receivers”, IEEE International Microwave Symposium, Boston, June 2000. In a bipolar transistor design, the IIP
3
typically increases with increasing current consumption but so does the noise figure at high currents. Thus, in a standard design, high IIP
3
often results in poor noise figure and excessive current consumption.
Conventional Techniques for IIP
3
Improvement in Bias Circuits
There are several conventional techniques to obtain higher IIP
3
without sacrificing noise figure or current consumption.
The IIP
3
at RF frequencies is strongly affected by the presence of low-frequency distortion products. See, for example, V. Aparin, C. Persico, “Effect of Out-of-Band Termination on Intermodulation Distortion in Common-Emitter Circuits”, IEEE MTT-S Dig, vol. 3, June 1999, pp. 977-980. In a two-tone test, nonlinearities will cause the generation of several mixing products. One of these occurs at (f
1
−f
2
) where f
1
and f
2
are the frequencies of the two tones. This can be viewed as a low-frequency modulation of the operating point. Due to unavoidable internal feedback inside the transistor as well as external feedback, the (f
1
−f
2
) product will mix again with f
1
and f
2
, thus creating in-band distortion products at the IM
3
frequencies (f
1
−f
2
)=f
1
=2*f
1
−f
2
and (f
2
−f
1
)+f
2
=2*f
2
−f
1
. In order to obtain high IIP
3
, it is therefore beneficial to ensure that a low impedance is presented to these products, essentially shorting them out.
It is a common design approach of power amplifiers to reduce the low-frequency impedance of the bias circuits as much as possible to avoid the bias modulation. See, for example, F. N. Sechi, “Linearized Class-B Transistor Amplifiers”, IEEE J. Solid-State Circuits, vol. 11, April 1976, pp. 264-270.
SUMMARY OF THE INVENTION
The low-frequency impedance approach has not been previously used in the design of LNAs (as distinct from bias circuits). As it will be seen later the improvement can be quite dramatic.
In addition to this technique, we also take advantage of the fact that the chosen two-stage architecture allows tailoring of the inter-stage matching network to provide optimum IIP
3
. This is utilized in a technique explained below in “Graphical Design Technique”.


REFERENCES:
patent: 5039954 (1991-08-01), Bult et al.
patent: 5926069 (1999-07-01), Ko et al.
patent: 6023197 (2000-02-01), Ter Laak et al.

Affiliated with

Also associated with

Rating

Two-stage LNA with good linearity does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Two-stage LNA with good linearity, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Two-stage LNA with good linearity will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2940134