Level shift circuit

Details Level shift circuit Level shift circuit

2001-10-05

2002-12-31

Zweizig, Jeffrey (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Amplitude control

Reexamination Certificate

active

06501321

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a level shift circuit for use in communicating, without potential insulation, on/off signals from a circuit connected to a common potential such as a ground to a control electrode of a controllable semiconductor device such as a semiconductor switching device on an upper arm of a power-inverting bridge circuit, for example, in a PWM inverter or a switching power supply, the controllable semiconductor device having an electrode (an emitter or a source) that acts as a potential reference for an input control drive signal and that has a potential varying relative to the common potential. Desirably, the present invention relates to a level shift circuit for use in the form of an HVIC (high-voltage IC).
BACKGROUND ART
In the interest of cost reduction, level shift circuits free from potential insulation provided be a transformer or a photocoupler have recently been used as circuits for turning on and off a semiconductor switching device constituting an upper arm of a power-inverting (i.e., conversion of a direct current into an alternate current) bridge circuit such as a PWM inverter.
FIG. 7
shows an example configuration of a conventional level shift circuit of this kind. In this FIG.,
17
and
18
are output IGBTs connected in series between a main DC power supply Vdc (a positive-electrode side) for a high voltage, for example, 400 V and a common potential COM located at a negative-electrode side of this power supply, in order to form, for example, one phase of a power-inverting bridge circuit of a PWM inverter.
OUT denotes a connection point between an emitter of the upper-arm IGBT
17
of the bridge circuit and the lower-arm IGBT
18
thereof; that is, this is an output terminal for AC power generated by alternately turning on and off the IGBTs
17
and
18
.
E
2
denotes, for example, a 15-V auxiliary DC power supply (also referred to as a “driver power supply”) having a negative electrode connected to the common potential COM, and 20 is a driver for turning on and off the lower-arm IGBT
18
and which operates under the auxiliary DC power supply E
2
.
The remaining part of the circuit constitutes a level shift circuit for driving the upper-arm IGBT
17
of the bridge circuit. That is, reference numeral
1
designates a high-voltage MOSFET for inputting and conducting an on signal
25
consisting of pulses generated by a circuit (not shown) so that the resulting voltage drop in a load resistor
3
is used as a signal to turn on the IGBT
17
. Reference numeral
2
designates a high-voltage MOSFET for inputting and conducting an off signal
26
consisting of pulses generated by a circuit (not shown) so that the resulting voltage drop in a load resistor
4
is used as a signal to turn off the IGBT
17
.
Normally, the high-voltage MOSFETs
1
and
2
are configured to be equal to each other, as are the load resistors
3
and
4
. Constant-voltage diodes
5
,
6
connected in parallel to the load resistors
3
,
4
, respectively, limit any excessive voltage drop in the load resistors
3
,
4
to protect NOT circuits
8
,
9
or the like, which will be described below.
In the level shift circuit, the two MOSFETs
1
and
2
constitute a circuit section for inputting a signal based on the stationary common potential COM. On the other hand, the portion of the circuit enclosed by the broken line in the figure indicates a circuit section with a varying potential which operates based on the potential of the AC output terminal OUT that alternately follows the common potential COM and the potential Vdc of the main DC power supply depending on whether the IGBTs
17
,
18
are turned on or off.
E
1
in the circuit enclosed by the broken line denotes, for example, a 15-V auxiliary DC power supply (also referred to as a “driver power supply”) having a positive electrode connected to a line Vcc
1
and a negative electrode connected to the AC output terminal OUT. The NOT circuits
8
,
9
and subsequent circuits [consisting of low-pass filter circuits (also simply referred to as “LPFs”)
30
,
31
, a RS flip flop (a RS latch also simply referred to as an “RS-FF”)
15
, a driver
16
, etc.] operate using the auxiliary DC power supply E
1
as a power supply.
However, a power supply voltage for a load resistor circuit for the high-voltage MOSFETs
1
and
2
which comprises the load resistors
3
,
4
with their upper ends connected to the positive-electrode line Vcc
1
of the auxiliary DC power supply E
1
varies between a maximum value (E
1
+Vdc) and a minimum value E
1
because the potential of the output terminal OUT varies between the common potential COM and the DC power supply potential Vdc.
Actually, however, a free wheel diode (not shown) is connected in parallel to each of the IGBTs
17
,
18
in such a manner that its cathode is located on a collector side. Thus, when the free wheel diodes are in an ON-state, the potential of the output terminal OUT may have a negative value of several V relative to the common potential COM.
Next, operation of this level shift circuit will be described. The on signal
25
is applied to a gate of the MOSFET
1
to cause a current to flow through the MOSFET
1
to induce a voltage drop in the load resistor
3
. When the potential at a lower end of the load resistor
3
becomes smaller than a threshold for the NOT circuit
8
, an output from the NOT circuit
8
is set to the Hi level.
This Hi level is applied to a set terminal S of the RS latch
15
via the LPF
30
to set an output Q from the RS latch
15
to the Hi level, thereby turning the output IGBT
17
on via the driver
16
. At the same time (strictly speaking, for prevention of a possible inter-arm short circuit, slightly before the point of turn-on), the IGBT
18
is turned off via a circuit (not shown) including the driver
20
.
Next, the off signal
26
is applied to a gate of the MOSFET
2
to cause a current to flow through the MOSFET
2
to induce a voltage drop in the load resistor
4
. When the potential at a lower end of the load resistor
4
becomes smaller than a threshold for the NOT circuit
9
, an output from the NOT circuit
9
is set to the Hi level.
This Hi level is applied to a reset terminal R of the RS latch
15
via the LPF
31
to set the output Q from the RS latch
15
to a Lo level, thereby turning the output IGBT
17
off via the driver
16
. At the same time (strictly speaking, for prevention of a possible inter-arm short circuit, slightly after the point of turn-off), the IGBT
18
is turned on via the circuit (not shown) including the driver
20
.
When the output IGBT
18
is turned off or the IGBT
17
is turned on, this switching causes a rapid increase in potential dV/dt at the output terminal OUT to charge a capacitance between a source and a drain of each of the MOSFETs
1
and
2
.
This charge current may induce a voltage drop in the load resistors
3
and
4
which is different from the true on and off signals, thereby causing the RS latch
15
to malfunction, mistakenly turning on the IGBT
17
to cause an inter-arm short circuit in the bridge circuit, or unnecessarily turning off the IGBT
17
.
In addition to switching of the IGBTs
17
,
18
, extraneous noise may induce a similar abnormal voltage drop in the load resistors
3
,
4
.
The low-pass filters (LPF)
30
and
31
are inserted to prevent such malfunctioning of the RS latch
15
in order to remove, as abnormal signals, input signals of a small pulse width (a high frequency) resulting from switching or extraneous noise.
The reason why the on/off pulse signals
25
,
26
are used to turn on and off the output IGBT
17
as in the circuit in
FIG. 7
will be described below. In order to reduce harmonics components of an AC output from a PWM inverter or the like at low cost, it is desirable to increase a carrier frequency at which an output switching device is turned on and off and thus to operate the level shift circuit at a high speed.
To operate the level shift circuit at a high speed, a relatively high current must flow through t

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