Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With provision for cooling the housing or its contents
Reexamination Certificate
1998-05-26
2002-06-11
Potter, Roy (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With provision for cooling the housing or its contents
C257S778000
Reexamination Certificate
active
06404049
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a semi-conductor device and its manufacturing method, and more particularly to a technology which is effectively applied to a semiconductor device having an LSI package superior in heat radiation and reliability.
BACKGROUND ART
Advanced logic devices of late are achieving high speed by using higher operation frequencies and multiple bit signals. However, as the performance of semiconductor chips improves, in the conventional packages, that is, in packages including a lead frame, for example, the package size becomes large due to the limits of fabrication of the lead frame. Accordingly, when a package is mounted on a mounting board, the area of the mounting board occupied by the package and outer leads increases, so that the merits of high density integration of functions are reduced to some extent. Furthermore, owing to the improvement in the operation frequency by enhanced performance and the increased number of gates by high density device integration, power consumption increases. Under this situation, the semi-conductor chips have come to generate large quantities of heat, and it is absolutely necessary to cope with the increase of pins and develop a lower thermal resistance package structure. In the conventional packages, sufficient measures for radiation of heat generated from the semiconductor chips have not been taken. A first technology to solve this problem is disclosed in JP-A-07-326625 in which a semiconductor chip (LSI) having connection terminals on the whole circuit area is mounted by the face-down bonding on a carrier substrate, and the space between the semiconductor chip and the carrier substrate is completely filled with a sealing resin. In addition, a heat spreader is provided on the reverse side of the semiconductor chip.
A second technology is revealed in JP-A-06-224246 in which the package includes a conductive substrate with a cavity for accommodating a semiconductor chip having a plurality of bonding pads and a flexible circuit stacked on the conductive substrate. The flexible circuit includes a wiring pattern and an area array of bumps formed on the pads on the surface of the circuit. Under those pads, there are a plurality of openings leading to the flexible circuit, patterned wiring traces to ground and the substrate. In stacking the flexible circuit to the substrate, a conductive adhesive is used which facilitates electrical connection of the ground pad whose opening is set in the substrate.
A third technology is described in JP-A-04-119653 in which a semiconductor chip is installed on a metal plate, an insulator is stacked on the metal plate so as to surround the semiconductor chip, and patterned outer leads for electrical conduction to an external circuit, such as a mounting board, are formed on the surface of the insulator.
A fourth technology is shown in JP-A-05-82567 in which a package comprises a substrate of ceramic or the like having a hole in the center, a cap having a TAB-LSI, which is to be connected to the substrate, bonded thereto by die bonding and sealing, and a sealing resin filled between the substrate and the TAB-LSI in such a way that the hole of the substrate is closed air-tightly. The die-bonded TAB-LSI is filled with a sealing resin, a pressure is applied to the TAB-LSI to complete the bonding and the whole circuit area of the TAB-LSI is covered with the sealing resin.
A fifth technology is discussed in Nikkei Electronics, No. 602, issued on Feb. 28, 1994 in which a heat radiator plate or the cover is bonded to a semiconductor chip (LSI chip) with an adhesive for heat dissipation, and the semiconductor chip and solder terminals are connected using a TAB tape. The TAB tape and the semiconductor chip are bonded together by flip chip connection, and the space between the TAB tape and the semiconductor chip is filled with a sealing resin. The whole package is supported by gluing the heat radiation plate or the cover to the TAB tape with an adhesive.
Nonetheless, even with the first to fifth technologies, if the heat radiation characteristic is given priority, the reliability after device-mounting decreases, or if the reliability is given priority, great heat radiation characteristic cannot be obtained. In other words, the contradictory relation between heat radiation characteristic and reliability has not been overcome.
More specifically, the high heat radiation characteristic depends on a thermal resistance between a chip and a package and a thermal resistance between the chip and air. To obtain a high heat radiation character istic, it is necessary to use a high heat-conduction adhesive between the chip and the package and also use high heat-conduction materials for the chip and the package.
However, the reliability of the package cannot be improved only by using materials meeting the above-mentioned requirement. The present inventors have clarified that the packages of structures shown in the first to the fifth technology are unable to sufficiently deal with thermal stress due to the heat generated when the chip operates or when the chip is mounted on the circuit board.
An object of the present invention is to provide a semiconductor device adaptable to an increasing number of pins, in which high heat radiation characteristic and high reliability are compatible. Another object of the present invention is to provide a semi-conductor device adaptable to an increasing number of pins, in which high heat radiation characteristic and high reliability are compatible.
The foregoing and other objects and the novel features of the present invention will be apparent from the description of the specification and the accompanying drawings.
DISCLOSURE OF INVENTION
In the semiconductor device according to the present invention, a semiconductor chip is bonded by metal bonding to one surface of the heat sink whose thermal expansion coefficient is close to that of the semiconductor chip. The heat sink is bonded to a stiffener with a silicon adhesive with an elastic modulus of 10 MPa or less. A TAB tape is bonded to the stiffener with an organic adhesive, such as an epoxy resin adhesive. The heat sink is bonded to the stiffener with a silicone adhesive of an elastic modulus of 10 MPa or less. The TAB tape is electrically connected to the electrodes of the semiconductor chip. The semiconductor chip sealed with a sealing epoxy resin with an elastic modulus of 10 GPa or more.
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Nikkei Electronics, Fev. 28, 1994, No. 602, pp. 111-117.
Anjo Ichiro
Arita Junichi
Haruta Ryo
Ichitani Masahiro
Matsumoto Katsuyuki
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