Semiconductor device manufacturing: process – With measuring or testing – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2000-01-19
2002-06-25
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
With measuring or testing
Packaging or treatment of packaged semiconductor
C438S014000, C438S015000, C438S106000, C438S127000, C257S678000, C257S679000, C257S787000
Reexamination Certificate
active
06410355
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the packaging of semiconductor integrated circuits. In particular, the system relates to the packaging of memory chips.
BACKGROUND OF THE INVENTION
In recent years, flash Electrically Erasable Programmable Read-Only Memory (EEPROM) has become popular. Flash EEPROMs are a high-density, nonvolatile memory.
This flash EEPROM package contains multiple integrated circuits, including a controller chip and a memory chip. The flash memory packages also require capacitors for charge pumping so that the required programming voltage can be obtained from a lower circuit voltage.
It is desired to have a smaller, thinner memory package format to be used with digital cameras and the like.
SUMMARY OF THE PRESENT INVENTION
In order to have a small package, the system of the present invention puts the integrated circuits onto a circuit board or PC board, where a conductive layer of the circuit board forms the terminals for the package. This conductive layer of the circuit board is positioned on the outside of the package. In this way, a very thin package can be produced. No additional connections are required from the circuit board to terminals.
In one preferred embodiment, the circuit board with the integrated circuits and passive devices can be placed in a mold and encapsulated in plastic with the terminal side of the circuit board exposed. Before the encapsulating process, the integrated circuits used in the package can be covered with an epoxy material or with another type of plastic for protection. Alternately, the circuit board with the integrated circuits and passive devices can be glued into a plastic case or overmolded.
Another embodiment of the present invention concerns a testing connection region of the circuit board. At one end of the circuit board, testing connections allow access to the integrated circuits for burn-in testing the integrated circuits and allow the programming of the integrated circuits so as to avoid bad memory cells. The testing connection region of the circuit board material is cut away before packaging so that the final package can have a smaller form.
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Bowers Charles
Geyer Scott B.
Sandisk Corporation
Skjerven Morrill & MacPherson LLP
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