Silicon single crystal wafer having few crystal defects

Details Silicon single crystal wafer having few crystal defects Silicon single crystal wafer having few crystal defects

2000-01-26

2002-02-19

Nguyen, Ngoc-Yen (Department: 1754)

Chemistry of inorganic compounds

Silicon or compound thereof

Elemental silicon

C023S29500G

Reexamination Certificate

active

06348180

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for producing a silicon single crystal having few crystal defects, as well as to a silicon single crystal wafer produced by the method.
2. Description of the Related Art
Along with a decrease-in size of semiconductor devices for achieving an increased degree of integration of semiconductor circuits, more severe quality requirements have recently been imposed on silicon single crystals which are grown by the Czochralski method (hereinafter referred to as the CZ method) for use as materials for substrates of semiconductor circuits. Particularly, there has been required a reduction in density and size of grown-in defects such as flow pattern defects (FPDs), laser scattering tomography defects (LSTDs), and crystal originated particles (COPs), which are generated during the growth of a single crystal and degrade oxide dielectric breakdown voltage and characteristics of devices.
In connection with the above-mentioned defects incorporated into a silicon single crystal, first are described factors which determine the concentration of a point defect called a vacancy (hereinafter may be referred to as V) and the concentration of a point defect called an interstitial-Si (hereinafter may be referred to as I).
In a silicon single crystal, a V region refers to a region which contains a relatively large number of vacancies, i.e., depressions, pits, voids or the like caused by missing silicon atoms; and an I region refers to a region which contains a relatively large number of dislocations caused by excess silicon atoms or a relatively large number of clusters of excess silicon atoms. Further, between the V region and the I region there exists a neutral (hereinafter may be referred to as N) region which contains no or few excess or missing silicon atoms. Recent studies have revealed that the above-mentioned grown-in defects such as FPDs, LSTDs, and COPs are generated only when vacancies and/or interstitials are present in a supersaturated state and that even when some atoms deviate from their ideal positions, they do not appear as a defect so long as vacancies and/or interstitials do not exceed the saturation level.
It has been confirmed that the concentration of vacancies and/or interstitials depends on the relation between the pulling rate (growth rate) of a crystal in the CZ method and the temperature gradient G in the vicinity of a solid-liquid interface of the crystal, and that another defect called oxidation-induced stacking fault (OSF) is present in ring-shape distribution in the vicinity of the boundary between the V region and the I region.
The manner of generation of defects due to growth of a crystal changes depending on the growth rate. That is, when the growth rate is relatively high; e.g., about 0.6 mm/min, grown-in defects such as FPDs, LSTDs, and COPs—which are believed to be generated due to voids at which vacancy-type points defects aggregate—are present at a high density over the entire radial cross section of a crystal. The region where these defects are present is called a “V-rich region” (see FIG.
5
(
a
)). When the growth rate is not greater than 0.6 mm/min, as the growth rate decreases the above-described OSF ring is produced from a circumferential portion of the crystal. In such a case, L/D (large dislocation, simplified expression of interstitial dislocation loop) defects such as LSEPDs and LFPDs—which are believed to be generated due to dislocation loop—are present at a low density outside the OSF ring. The region where these defects are present is called an “I-rich region” (see FIG.
5
(
b
)). Further, when the growth rate is decreased to about 0.4 mm/min, the above-described OSF ring converges to the center of a wafer and disappears, so that the I-rich region spreads over the entire cross section of the wafer (see FIG.
5
(
c
)).
Further, there has been found the existence of a region, called an N (neutral) region, which is located between the V-rich region and the I-rich region and outside the OSF ring and in which there exist neither grown-in defects (FPDs, LSTDs, and COPs) stemming from voids nor L/D defects (LSEPDs and LFPDs) stemming from a dislocation loop (see Japanese Patent Application Laid-Open (kokai) No. 8-330316). The N region has been reported to be located outside the OSF ring and is located on an I-Si side, so that substantially no oxygen precipitation occurs when a single crystal is subjected to a heat treatment for oxygen precipitation and the contrast due to oxide precipitates is observed through use of an X-ray beam. Further, the N-region has been reported to be not rich enough to cause formation of LSEPDs and LFPDs (see FIG.
4
(
a
)). It has been proposed that the N region can be expanded over the entire wafer surface when a ratio F/G is controlled to fall within the range of 0.20-0.22 mm
2
/°C.·min through an improvement of the intra-furnace temperature distribution and adjustment of the pulling rate, wherein F is a pulling rate (mm/min) of the single crystal, and G is an average intra-crystal temperature gradient (°C./mm) within a temperature range of the melting point of silicon to 1300° C. (see FIG.
4
(
b
))
However, when a single crystal is produced such that the region having a very low defect density is expanded to the entire crystal, the control range of production conditions becomes extremely narrow, because the region must be an I-Si side N region. Setting aside experimental apparatus, such precise control is difficult to perform in a mass-production-type apparatus. Further, since productivity is low, the proposed technique is not practical.
Further, the inventors of the present invention found that the defect distribution chart shown the in above-mentioned patent publication greatly differs from data that the inventors of the present invention obtained through experiments and investigations and consequently from a defect distribution chart (see
FIG. 1
) that was made based on the thus-obtained data.
Further, the N region distributed outside the OSF ring was found to include a region where a larger amount of precipitated oxygen (hereinafter may be referred to as an “N
2
(V)” region), and a region where a smaller amount of precipitated oxygen (hereinafter may be referred to as an “N(I)” region). Therefore, if a wafer is merely produced in the N region outside the OSF ring, the N
2
(V) region where a larger amount of precipitated oxygen and the region N(I) where a smaller amount of precipitated oxygen are formed mixedly within the wafer, with the result that the device yield decreases due to a difference in gettering capability.
SUMMARY OF THE INVENTION
In view of the foregoing, an object of the invention is to enable highly efficient production of a silicon single crystal in accordance with the CZ method, under production conditions that broaden the range of control and facilitate control, such that the silicon single crystal has neither a V-rich region nor an I-rich region and therefore has an extremely low defect density over the entire cross section of the crystal, as well as a gettering capability stemming from oxygen precipitation.
In order to achieve the above-described object, the present invention provides a method for producing a silicon single crystal in accordance with the CZ method, wherein the single crystal is grown in an N
2
(V) region where a large amount of precipitated oxygen and which is located within an N region located outside an OSF ring region in a defect distribution chart (see
FIG. 1
) which shows a defect distribution in which the horizontal axis represents a radial distance D (mm) from the center of the crystal and the vertical axis represents a value of F/G (mm
2
/°C.·min), where F is a pulling rate (mm/min) of the single crystal, and G is an average intra-crystal temperature gradient (°C./mm) along a pulling direction within a temperature range of the melting point of silicon to 1400° C.
In a silicon single crystal wafer produced in accordance with the method of the present invention, neither FPDs nor L/D

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