Method and apparatus for forming modular sockets using...

Electrical connectors – With insulation other than conductor sheath – Plural-contact coupling part

Reexamination Certificate

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Reexamination Certificate

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06478627

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to methods and apparatus for electrically connecting semiconductor devices to circuit boards. More particularly, the invention relates to a socket into which one or more bare semiconductor die may be inserted for connection to a circuit board without wire bonding of the contact pads of the semiconductor die.
2. State of the Art
The assembly of a semiconductor device from a leadframe and semiconductor die ordinarily includes bonding of the die to a paddle of the leadframe, and wire bonding bond pads on the die to inner leads i.e. lead fingers of the leadframe. The inner leads, semiconductor die, and bond wires are then encapsulated, and extraneous parts of the leadframe excised, forming outer leads for connection to a substrate such as a printed wiring board (PWB).
The interconnection of such packaged integrated circuits (IC) with circuit board traces has advanced from simple soldering of package leads to the use of mechanical sockets, also variably known as connectors, couplers, receptacles and carriers. The use of sockets was spurred by the desire for a way to easily connect and disconnect a packaged semiconductor die from a test circuit, leading to zero-insertion-force (ZIF), and low-insertion-force (LIF) apparatus. Examples of such are found in U.S. Pat. No. 5,208,529 of Tsurishima et al., U.S. Pat. No. 4,381,130 of Sprenkle, U.S. Pat. No. 4,397,512 of Barraire et al., U.S. Pat. No. 4,889,499 of Sochor, U.S. Pat. No. 5,244,403 of Smith et al., U.S. Pat. No. 4,266,840 of Seidler, U.S. Pat. No. 3,573,617 of Randolph, U.S. Pat. No. 4,527,850 of Carter, U.S. Pat. No. 5,358,421 of Petersen, U.S. Pat. No. 5,466,169 of Lai, U.S. Pat. No. 5,489,854 of Buck et al., U.S. 5,609,489 of Bickford et al., U.S. Pat. No. 5,266,833 of Capps, U.S. Pat. No. 4,995,825 of Korsunsky et al., U.S. Pat. Nos. 4,710,134 and 5,209,675 of Korsunsky, U.S. 5,020,998 of Ikeya et al., U.S. Pat. No. 5,628,635 of Ikeya, U.S. Pat. No. 4,314,736 of Demnianiuk, U.S. Pat. No. 4,391,408 of Hanlon et al., and U.S. Pat. No. 4,461,525 of Griffin.
New technology has enabled the manufacture of very small high-speed semiconductor dice having large numbers of closely spaced bond pads. However, wire bonding of such semiconductor dice is difficult on a production scale. In addition, the very fine wires are relatively lengthy and have a very fine pitch, leading to electronic noise.
In order to meet space demands, much effort has been expended in developing apparatus for stack-mounting of packaged dies on a substrate in either a horizontal or vertical configuration. For example, vertically oriented semiconductor packages having leads directly connected to circuit board traces are shown in U.S. Pat. No. 5,444,304 of Hara et al., U.S. Pat. No. 5,450,289 of Kweon et al., U.S. Pat. No. 5,451,815 of Taniguchi et al., U.S. Pat. No. 5,592,019 of Ueda et al., U.S. Pat. No. 5,619,067 of Sua et al., U.S. Pat. No. 5,635,760 of Ishikawa, U.S. Pat. No. 5,644,161 of Burns, U.S. 5,668,409 of Gaul, and U.S. Pat. No. Re 34,794 of Famworth.
However, none of the above patents relates to the socket interconnection of a bare i.e. unpackaged semiconductor die to a substrate such as a circuit board.
Sockets also exist for connecting daughter circuit boards to a mother board, as shown in U.S. Pat. No. 5,256,078 of Lwee et al. and U.S. Pat. No. 4,781,612 of Thrush. U.S. Pat. Nos. 4,501,461 and Re. 28,171 of Anhalt show connectors for connecting a socket to a circuit board, and wiring to an electronic apparatus, respectively.
U.S. Pat. No. 5,593,927 of Farnworth et al. discloses a semiconductor die having an added protective layer and traces, and which is insertable into a multi-die socket. The conductive edges of the semiconductor die are connected through an edge “connector” to circuit board traces. The number of insertable semiconductor dice is limited by the number of semiconductor die compartments in the socket, and using fewer dice is a waste of space.
SUMMARY OF THE INVENTION
A modular bare die socket is provided by which any number of bare (unpackaged) semiconductor dice having bond pads along the edge of one major side may be interconnected with a substrate in a densely packed arrangement. The socket is particularly applicable to high speed, e.g. 300 MHz dice of small size or those dice of even faster speeds.
The socket comprises a plurality of plates which have a semiconductor die slot structure for aligning and holding a bare die or dice in a vertical orientation, and interconnect structure for aligning and retaining a multi-layer lead tape in contact with conductive bond pads of an inserted die. The interconnect lead tapes have outer ends which are joined to conductive traces on a substrate such as a printed wiring board (PWB).
Each lead tape includes a node portion which is forced against a bond pad to make resilient contact therewith. Various means for providing the contact force include a resilient lead tape, an elastomeric layer or member biasing the lead tape, or a noded arm of the plate, to which the lead tape is fixed.
A multi-layer interconnect lead tape may be formed from a single layer of polymeric film upon which a pattern of fine pitch electrically conductive leads is formed. Methods known in the art for forming lead frames, including negative or positive photoresist optical lithography, may be used to form the lead tape. The lead tape may be shaped under pressure to the desired configuration.
The plates with intervening interconnect lead tapes are bonded together with adhesive or other means to form a permanent structure.
The plates are formed of an electrically insulative material and may be identical. Each plate has “left side structure” and “right side structure” which work together with the opposing structure of adjacent plates to achieve the desired alignment and retaining of the semiconductor die and the lead tape for effective interconnection.
Any number of plates may be joined to accommodate the desired number of bare semiconductor dice. Assembly is easily and quickly accomplished. If desired, end plates having structure on only one side may be used to cap the ends of the socket.
Thus, a socket is formed as a dense stack of semiconductor die-retaining plates by which the footprint per semiconductor die is much reduced.
The modular socket is low in cost and effectively provides the desired interconnection. A short interconnect lead distance is achieved, leading to reduced noise. The impedance may be matched up to the contact or semiconductor die.
The primary use of the modular bare semiconductor die socket is intended to be for permanent attachment to circuit boards of electronic equipment where die replacement will rarely be required. Although the socket may be used in a test stand for temporarily connecting dice during testing, new testing techniques performed at the wafer scale generally obviate the necessity for such later tests.


REFERENCES:
patent: 2971179 (1961-02-01), Heuer
patent: 3573617 (1971-04-01), Randolph et al.
patent: RE28171 (1974-09-01), Anhalt
patent: 3924915 (1975-12-01), Conrad
patent: 4113981 (1978-09-01), Fujita et al.
patent: 4266840 (1981-05-01), Seidler
patent: 4314736 (1982-02-01), Demnianiuk
patent: 4381130 (1983-04-01), Sprenkle
patent: 4391408 (1983-07-01), Hanlon et al.
patent: 4397512 (1983-08-01), Berraire et al.
patent: 4418475 (1983-12-01), Ammon et al.
patent: 4461525 (1984-07-01), Griffin
patent: 4501461 (1985-02-01), Anhalt
patent: 4527850 (1985-07-01), Carter
patent: 4710134 (1987-12-01), Korsunsky
patent: 4781612 (1988-11-01), Thrush
patent: 4811165 (1989-03-01), Currier et al.
patent: 4889499 (1989-12-01), Sochor
patent: 4892487 (1990-01-01), Dranchak et al.
patent: 4995825 (1991-02-01), Korsunsky et al.
patent: 5020998 (1991-06-01), Ikeya et al.
patent: 5038250 (1991-08-01), Uenaka et al.
patent: 5061845 (1991-10-01), Pinnavaia
patent: 5208529 (1993-05-01), Tsurishima et al.
patent: 5209675 (1993-05-01), Korsunsky
patent: 5242310 (1993-09-01), Leung
patent: 5244403 (1993-09-01), Smith et a

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