Television – Camera – system and detail – Solid-state image sensor
Reexamination Certificate
2000-02-04
2002-08-27
Christensen, Andrew B. (Department: 2612)
Television
Camera, system and detail
Solid-state image sensor
C348S299000, C348S308000
Reexamination Certificate
active
06441852
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to imaging systems and, in particular, to imaging systems which increase photodetector charge capacity towards the end of the integration period to extend the dynamic range of the imaging system.
2. Description of the Related Art
The entire disclosure of U.S. patent application Ser. No. 09/087,087, filed May 29, 1998, is expressly incorporated by reference herein
Various types of imagers (also sometimes referred to as image sensors) are in use today, including charge-coupled device (CCD) imagers and complementary metal-oxide semiconductor (CMOS) imagers. These devices are typically incorporated into CCD and CMOS imaging systems, respectively. Such imaging systems comprise an array of pixels, each of which contains a light-sensitive sensor element such as a CCD or, in CMOS imagers, a N+ to p-substrate photodiode, a virtual gate buried n-channel photodetector, or a photogate detector. Such light-sensitive sensor elements will be referred to herein, generally, as photodetectors.
CMOS imagers typically utilize an array of active pixel sensors and a row (register) of correlated double-sampling (CDS) circuits or amplifiers to sample and hold the output of a given row of pixel imagers of the array. Each active pixel typically contains a pixel amplifying device (usually a source follower). The term active pixel sensor (APS) refers to electronic image sensors within active devices, such as transistors, that are associated with each pixel. CMOS imagers are often interchangeably referred to as CMOS APS imagers or as CMOS active pixel imagers. The active pixel sensors and accompanying circuitry for each pixel of the array will be referred to herein as APS circuits or APS pixel circuits.
In both CMOS and CCD imager systems, each photodetector accumulates charge and hence voltage during the optical integration period in accordance with the light intensity reaching the relevant sensing area of the photodetector. As charge accumulates, the photodetector begins to fill. The charge stored in a photodetector is sometimes said to be stored in the “charge well” of CCD-type photodetectors. If the photodetector becomes full of charge, then excess charge is shunted off to a “blooming drain,” in part to prevent blooming. Blooming is a phenomenon in which excess charge beyond pixel saturation spills over into adjacent pixels, causing blurring and related image artifacts. In a CMOS system, the voltage of, for example, the photodiode, falls in accordance with the negative charge. However, if the photodetector becomes full before the end of the integration period and any additional photons strike the photodetector, then no additional charge can be accumulated (in the case of CMOS, the diode voltage cannot fall any lower). Thus, for example, if very bright light is applied to a photodetector, this can cause the photodetector to be full before the end of the integration period and thus to saturate and lose information.
Each APS circuit produces an output signal at the end of an integration period, which is related to the amount of charge accumulated during the integration period. The amount of charge is in turn related to the amount of light received by the photodetector of the APS circuit during the integration period. The output signal may be sampled and held by a CDS circuit, and then applied to a buffer for signal processing.
U.S. Pat. No. 3,953,733, issued Apr. 27, 1976 to Levine (“Levine”), the entirety of which is incorporated herein by reference, teaches a method of operating CCD imagers to avoid this problem. The voltage applied to the electrodes of a CCD cause a heavily depleted region to form beneath the electrode, which forms “potential wells” or charge wells of a given maximum charge capacity. A greater electrode voltage causes a correspondingly greater charge capacity well to form. The voltage that controls the maximum charge capacity of a photodetector, such as the CCD electrode voltage, will be referred to herein as the charge capacity control voltage, and the maximum charge that can be accumulated in a photodetector will be referred to herein as the photodetector's charge capacity. The charge capacity control voltage is also sometimes referred to as the blooming barrier voltage, since it acts as a blooming drain to remove charge from the pixel photodiode to avoid charge spilling into adjacent pixels during optical overload.
Typically, the charge capacity control voltage applied is constant throughout the integration period, so that a given charge capacity exists throughout the integration period for each pixel of the imager array. In Levine, the charge capacity control voltage is varied during the integration period, so as to increase the optical dynamic range of the CCD imager. Levine thus teaches an extended dynamic range (XDR) system. For example, in one embodiment, Levine teaches increasing the charge capacity control voltage (and hence the charge capacity) in non-linear fashion, by increasing the charge capacity control voltage in discrete steps towards the end of the integration period. Levine also teaches other methods of increasing the charge capacity control voltage and charge capacity towards the end of the integration period to extend the dynamic range of the imaging system, such as using enough multiple discrete steps to implement a continuously increasing charge capacity control voltage; or using linearly increasing charge capacity control voltage waveforms and increasing the slope or slopes of such waveforms.
In a CMOS XDR imager system, each photodetector of the array of photodetectors is configured so as to accumulate charge up to a first maximum charge capacity during a first, majority portion of the integration period. This may be done by resetting a photodiode voltage to an initial voltage at the beginning of the integration period. The voltage then decreases from the initial level as charge accumulates. At a time before the end integration period, the photodiode voltage is pulled up to a second level, in case it has been saturated (i.e., is below the second level). This thus clears the pixel of signal beyond the second level, which allows more charge to be accumulated for the remainder of the integration period. This effectively provides a first charge capacity during the first part of the integration period and an additional charge capacity for the remainder thereof.
Very bright light will thus saturate during the first period and will accumulate again during the second period. The point between the first portion of the integration period and the remainder when saturation occurs (and thus XDR is utilized) may be referred to as the breakpoint. The first portion and charge accumulated during the first portion are associated with a “linear” range, and the remainder portion and any excess charge accumulated during this remainder portion are associated with an “extended” dynamic range. The linear range has higher sensitivity than the XDR, but the XDR allows at least some contrast to be measured for higher light levels that otherwise would have saturated the linear range.
The total accumulated charge may be read out at the end of the integration period by a CDS circuit or other suitable means, which samples and holds the output of a given photodetector of the array. This may be converted to a digital number representative of the total charge. Standard mathematical techniques may then be applied to this information, based on the ratio of the two time periods and related information, to determine the total overall light that has impinged on the corresponding photodetector during the integration period.
CMOS imagers have several advantages over CCD imagers. For example, CCD imagers are not easily integrated with CMOS process peripheral circuitry due to complex fabrication requirements and relatively high cost. By contrast, since CMOS imagers are formed with the same CMOS process technology as the peripheral circuitry required to operate the CMOS imager, such sensors are easier to integ
Levine Peter A.
McCaffrey Nathaniel J.
Sauer Donald J.
Burke William J.
Christensen Andrew B.
Sarnoff Corporation
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