Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
2001-05-18
2002-11-12
Sherry, Michael (Department: 2829)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S754120, C324S1540PB, C324S760020, C324S765010
Reexamination Certificate
active
06480011
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a screening technique of semiconductor integrated circuit devices, e.g., Large-Scale Integrated circuit devices (LSIs). More particularly, the invention relates to a method of and an apparatus for screening semiconductor integrated circuit devices that screen out faulty devices (i.e., LSIs with some early failure), and a computer program product having a computer readable medium and a computer program recorded thereon that performs the method.
2. Description of the Related Art
Conventionally, the “burn-in” test or procedure has been well known and actually performed as a method of screening out defective LSIs with some early failure. This test or procedure is explained in detail, for example, in a book entitled “Integrated Circuit Quality and Reliability” written by Eugene R. Hnatek, pp. 719-720. This is a method to deliberately apply electrical stress to LSIs to be tested in a high-temperature environment, thereby making temperature-dependent potential failures obvious in a comparatively short period of time. This is carried out to screen out faulty LSIs with some potential failure in an early stage, thereby improving the reliability of LSIs.
As explained above, the burn-in test is one of the accelerated tests capable of eliciting the potential failure of LSIs in a comparatively short period of time. However, this test has a disadvantage that it may take a long time such as several hundreds or several thousands hours to complete the test when the type of failure modes to be elicited is time-consuming and/or the required level of reliability is high. Thus, there is the need to make it possible to screen out defective or faulty LSIs with some potential failure in a sufficiently short period of time.
Moreover, the burn-in test has a danger that the potential failure of LSIs is unable to be found or observed, which is due to the following reason. Specifically,. potential defects or failures existing in LSIs degrade gradually with time due to applied stresses in the burn-in test. These defects or failures are not found or observed unless they are completely elicited during the test. Thus, there is a possibility that the potential defects or failures in LSIs are not found even if the test is finished.
SUMMARY OF THE INVENTION
Accordingly, an object of the present invention is to provide a method of screening semiconductor integrated circuit devices that makes it possible to screen out faulty devices before potential failure existing therein through a burn-in test is elicited, and a computer program product that performs the method.
Another object of the present invention is to provide an apparatus for screening semiconductor integrated circuit devices capable of screening out faulty devices before potential failure existing therein is elicited through a burn-in test.
Still another object of the present invention is to provide a method of screening semiconductor integrated circuit devices that screens out faulty devices with potential failure in a short period of time, and a computer program product that performs the method.
A further object of the present invention is to provide an apparatus for screening semiconductor integrated circuit devices capable of screening out faulty devices with potential failure in a short period of time.
The above objects together with others not specifically mentioned will become clear to those skilled in the art from the following description.
According to a first aspect of the present invention, a method of screening semiconductor integrated circuit devices is provided This method comprises the steps of:
(a) supplying a specific power supply voltage to semiconductor integrated circuit devices to be tested while applying a specific test signal to the devices at a specific period;
(b) observing power supply currents of the devices caused by the power supply voltage and the test signal;
(c) generating sets of power spectrum data of the power supply currents of the devices corresponding to the test signal;
(d) generating distributions of the sets of power spectrum data of the power supply currents; and
(e) judging whether or not the distributions of the sets of power spectrum data of the power supply currents are equal to or greater than a specific reference value;
wherein when the distribution of the set of power spectrum data of the power supply current of one of the devices is equal to or greater than the reference value, the device in question is regarded as a faulty one,
With the method according to the first aspect of the present invention, a specific power supply voltage is supplied to semiconductor integrated circuit devices to be tested while applying a specific test signal to the devices at a specific period in the step (a). Then, power supply currents of the devices caused by the power supply voltage and the test signal are observed in the step (b). Sets of power spectrum data of the power supply currents of the devices corresponding to the test signal are generated in the step (c). Distributions of the sets of power spectrum data of the power supply currents are generated in the step (d). Finally, whether or not the distributions of the sets of power spectrum data of the power supply currents are equal to or greater than a specific reference value is judged in the step (e).
Thus, when the distribution of the set of power spectrum data of the power supply current of one of the devices is equal to or greater than the reference value, the device in question is regarded as a faulty or good one. As a result, faulty devices can be screened out before potential failure existing therein through a burn-in test is elicited.
Moreover, since no burn-in test is necessary, faulty devices with potential failure can be screened out in a short period of time.
In a preferred embodiment of the method according to the first aspect, further comprising a step of performing a burn-in test for the devices prior to the step (a). In this embodiment, there is an additional advantage that faulty devices can be screened out more accurately than the case where no burn-in test is carried out prior to the step (a).
In another preferred embodiment of the method according to the first aspect, the test signal includes a single set of test patterns, or sets of test patterns that are consecutively arranged with time, or sets of test patterns that are consecutively arranged with time at specific intervals.
According to a second aspect of the present invention, another method of screening semiconductor integrated circuit devices is provided. This method comprises the steps of:
(a) supplying a specific power supply voltage to semiconductor integrated circuit devices to be tested while applying a specific test signal to the devices at a specific period;
(b) observing power supply currents of the devices caused by the power supply voltage and the test signal;
(c) generating sets of power spectrum data of the power supply currents of the devices corresponding to the test signal;
(d) generating distributions of the sets of power spectrum data of the power supply currents before a burn-in test;
(e) performing the steps (a) to (d) while performing a burn-in test for the devices after the step (d), generating distributions of the sets of power spectrum data of the power supply currents during the burn-in test;
(f) performing the steps (a) to (d) after the burn-in test is completed in the step (e), generating distributions of the sets of power spectrum data of the power supply currents after the burn-in test;
(g) generating distribution change rates of power spectrum data of the power supply currents based on the distributions of the sets of power spectrum data of the power supply currents obtained in the steps (d), (e), and (f); and
(h) judging whether or not the distribution change rates of power spectrum data of the power supply currents generated in the step (g) are equal to or greater than a specific reference value;
wherein when the distribution change rate of power spectrum data of the power sup
Foley & Lardner
Nguyen Jimmy
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