Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Reexamination Certificate
2000-11-09
2002-06-25
Nguyen, Tuan H. (Department: 2813)
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
C438S003000, C438S240000
Reexamination Certificate
active
06410400
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing a capacitor for a semiconductor device, and more particularly to a method of manufacturing a capacitor having high capacitance using a Ta
2
O
5
thin film as the dielectric layer.
2. Description of the Related Art
As is well known, a capacitor can function as a storage location for storing data in a memory device such as a DRAM. Such capacitors have a structure in which a dielectric layer is interposed between a lower electrode and an upper electrode. The capacitance of the resulting capacitor is proportional to both the surface area of the electrode and the dielectric constant of the dielectric layer and is inversely proportional to the spacing between the electrodes, i.e., the thickness of the dielectric layer.
The capacitance of the capacitor can, therefore, be increased by increasing the surface area of the electrodes, forming the dielectric layer from a dielectric material having a higher dielectric constant, and/or reducing the thickness of the dielectric layer. Because the extent to which the thickness of the dielectric layer may be reduced without causing dielectric failures is limited, efforts to increase capacitance have generally focused on methods of extending the surface area of the electrode and/or using a dielectric layer having a higher dielectric constant.
The surface area of the electrode can be enlarged by forming a capacitor lower electrode having a 3-dimensional structure, such as cylindrical structures or others that provide increased height, and/or using polysilicon having a hemispherical grain (HSG) surface to increase the effective surface area of the electrode. It is, however, more difficult to manufacture lower electrodes having the hemispherical grain surfaces and/or other 3-dimensional structures. Particularly in those cases in which the height of the lower electrode is increased, the topology between a cell region and a peripheral circuit region is also increased. These height differences can complicate and degrade subsequent processing, particularly with regard to depth of focus and exposure control problems during subsequent photolithography processes.
Therefore, the current effort to manufacture a capacitor having increased capacitance remains mostly focused on methods of developing dielectric layers with higher dielectric constants.
For example, a stacked structure having oxide
itride/oxide (ONO) layers has been widely used as a dielectric layer. However, a simpler stacked structure having only nitride/oxide (NO) layers has been proposed and used as a dielectric layer in an effort to increase capacitance. Since the dielectric constant (&egr;) of the dielectric layer having the NO structure is about 4~5, capacitors using the NO structure as a dielectric layer can not provide sufficient capacitance to support the next generation DRAM products of more than 256M cells. It is expected that next generation DRAM products will require cell capacitance values on the order of 25fF/cell or more in order to suppress the generation of soft errors and reduce the refresh time. Consequently, a Ta
2
O
5
thin film having high dielectric constant of about 25~27 has been proposed as a replacement for the dielectric layer having the NO structure. Because the dielectric constant of the Ta
2
O
5
thin film is much higher than that of the NO structure, a Ta
2
O
5
capacitor can easily support next generation DRAM products having more than 256M cells.
Successfully using a Ta
2
O
5
thin film as the dielectric layer remains difficult for several reasons.
First, because the Ta
2
O
5
thin film has unstable stoichiometry, an exchangeable Ta atom in an oxygen vacancy state allows some leakage current to be generated in the film with the amount of leakage current varying with the composition ratio of Ta and O in the film. Accordingly, an additional oxidizing process is performed after depositing the Ta
2
O
5
thin film in order to remove the bulk of the oxygen vacancies. This addition step unavoidably complicates the manufacturing process.
Second, the Ta
2
O
5
thin film will oxidize both polysilicon and TiN, two materials commonly used to form the lower and upper electrodes. As a result, oxygen from the Ta
2
O
5
film tends to react with the electrode materials during subsequent thermal processes, thereby forming a low dielectric oxidation layer at the interfaces between the electrodes and the dielectric layer. The formation of these oxide layers degrades both the uniformity of the interfaces and the electrical characteristics of the resulting capacitor.
Third, organic matter from the tantalum (V) ethoxide Ta(OC
2
H
5
)
5
, the precursor compound for the Ta
2
O
5
layer, reacts with O
2
or N
2
O gases to form carbon, carbon compounds such as CH
4
and C
2
H
4
, and water vapor (H
2
O) that are, in turn, incorporated into the Ta
2
O
5
thin film as impurities. The presence of these impurities increases leakage current and degrades the capacitor's dielectric characteristics.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a method of manufacturing a Ta
2
O
5
capacitor that does not require an additional oxidizing process to remove oxygen vacancies in order to produce a Ta
2
O
5
thin film suitable for as a dielectric layer.
It is another object of the present invention to provide a method of manufacturing a Ta
2
O
5
capacitor capable of preventing the generation of a low dielectric oxidation layers produced by the reaction between the electrode material and oxygen inside the Ta
2
O
5
thin film dielectric layer.
It is another object of the present invention to provide a method of manufacturing a Ta
2
O
5
capacitor having improved leakage current characteristics and dielectric characteristics by removing organic contamination from the Ta
2
O
5
thin film.
A method of manufacturing a capacitor according to the present invention to accomplish the aforementioned objects comprises the steps of: providing a semiconductor substrate on which selected lower patterns are formed and covered by an intermediate insulating layer; forming a lower electrode on the intermediate insulating layer; nitrifying the surface of the lower electrode; depositing a Ta
2
O
5
thin film in an amorphous state on the nitrified surface of the lower electrode; annealing the amorphous Ta
2
O
5
thin film at a low temperature; annealing the low temperature annealed amorphous Ta
2
O
5
thin film at a high temperature to form a crystalline Ta
2
O
5
thin film as a dielectric layer; and forming an upper electrode on the dielectric layer comprising the crystalline Ta
2
O
5
thin film.
REFERENCES:
patent: 5910218 (1999-06-01), Park et al.
patent: 6162744 (2000-12-01), Al-Shareef et al.
patent: 6104203 (2001-03-01), Narwankar et al.
patent: 57167669 (1982-10-01), None
Joo Kwang Chul
Lee Kee Jeung
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