Etching a substrate: processes – Forming or treating electrical conductor article
Reexamination Certificate
2000-08-30
2002-12-17
Gulakowski, Randy (Department: 1746)
Etching a substrate: processes
Forming or treating electrical conductor article
C216S017000, C216S019000, C216S020000, C216S034000, C216S035000, C216S036000, C438S720000, C438S742000, C438S754000, C427S096400, C427S097100
Reexamination Certificate
active
06495053
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to an electrical circuit board and more particularly, to a multi-layer electrical circuit board having multiple circuit interconnections and having apertures and/or cavities which are formed within the circuit board and/or through various portions of the circuit board and which have improved solder-wetting characteristics.
BACKGROUND OF THE INVENTION
Multi-layer circuit boards contain and/or include electrical components which selectively and operatively populate opposed first and second surfaces (i.e., top and bottom surfaces) of each board (or other respective interior portions of each of the boards), thereby desirably allowing each of the electrical circuit boards to contain and/or include a relatively large amount of electrical components which efficiently and densely populate the respective boards.
It is desirable to allow for communication by and between and/or interconnection of the component containing surfaces and/or portions of an electrical circuit board, thereby allowing the contained electrical components on each side of the board (or within certain interior portions of the board) to cooperatively and selectively interconnect to form one or more desired electrical circuits. This communication and interconnection may require the use of shared electrical ground planes, the transmittal of electrical power and/or control type signals between each of the component containing surfaces and/or the component containing board portions, and/or the selective and physical connection of various contained components.
This desired interconnection typically requires one or more holes or cavities to be drilled and/or formed through one or more layers of the circuit board, thereby selectively creating one or more vias (i.e., holes which pass through some or all of the opposed component containing surfaces) which can be used to selectively connect various portions or layers of the circuit board. The vias are then typically filled with solder (e.g., a pin or component connector is soldered into the hole). In this manner, electrical connections are made or formed which connect electrical components and/or circuitry to the core of the circuit board substrate, to other circuit board layers, or to other components and/or circuitry located on the opposing side or surface of the board.
One drawback with these conventional vias is that layers of relatively non-solderable material (i.e., material which does not substantially bind or metallurgically bond with solder) are typically present within these vias, and thus, the solder does not consistently and reliably electrically connect the desired layers of circuitry and/or components together. For example and without limitation, many conventional multi-layer circuit boards include adhesive material or film which is used to couple portions of the circuit boards together. This adhesive film or material is often disposed adjacent to or in relative close proximity to a via and often softens and flows into the via when the circuit board substrate is laminated, thereby causing soldering defects in the subsequent circuit board construction processes. For example and without limitation, the adhesive which flows into the via often flows over or covers portions of the conducting surfaces or layers within the via (e.g., the bottom layer or surface of the via), thereby often preventing the solder from “wetting” or metallurgically bonding to the core or bottom layer of the circuit board. This results in a defective portion or region of the circuit board where all layers of the circuit board are not desirably interconnected.
There is therefore a need for a multi-layer electrical circuit board which overcomes some or all of the previously delineated drawbacks of prior circuit boards and winch includes improved vias or cavities for selectively interconnecting one or more layers of electrical circuitry.
SUMMARY OF THE INVENTION
It is a first object of the present invention to provide a method for producing a multi-layer electrical circuit board which overcomes some or all of the previously delineated drawbacks of prior multi-layer electrical circuit board forming methodologies and techniques.
It is a second object of the present invention to create a multi-layer circuit board having vias, apertures or cavities which provide highly reliable and solderable interconnections by eliminating the flow effects of adhesive materials that are used to form the circuit board.
It is a third object of the present invention to provide a method for producing a multi-layer electrical circuit board which overcomes some or all of the previously delineated drawbacks of prior multi-layer electrical circuit board forming methodologies and techniques and which allows for the selective, efficient, and reliable formation of apertures or cavities which allow for communication by and between some or all of the various component containing surfaces and portions of the formed multi layer electrical circuit board, which selectively allow components contained within and/or upon these portions and surfaces to be interconnected, and which is further adapted to selectively and communicatively receive an electrical component and/or an electrical component connector portion.
According to a first aspect of the present invention, a circuit board assembly including an aperture in which certain electrical connections can be made is provided. The circuit board assembly includes a first circuit board portion including a first conductive member having a top surface; a second circuit board portion having a bottom surface and a first region which forms a portion of the aperture; an adhesive material which is at least partially disposed between the first circuit board portion and the second circuit board portion, the adhesive material being effective to attach the first circuit board portion to the second circuit board portion during an assembly process, and being further effective to change from a solid state to a liquid state during the assembly process; and at least one annular groove which is formed within the top surface of the first conductive member, the at least one annular groove being effective to entrap at least a portion of the adhesive material when the adhesive material is in a liquid state, thereby substantially preventing the liquefied adhesive material from entering the first region of the circuit board during the assembly process and from interfering with the certain electrical connections.
These and other objects, aspects, and advantages of the present invention will become apparent upon reading the following detailed description in combination with the accompanying drawings.
REFERENCES:
patent: 3801388 (1974-04-01), Akiyama et al.
patent: 4404059 (1983-09-01), Livshits et al.
patent: 5455064 (1995-10-01), Chou et al.
patent: 5708569 (1998-01-01), Howard et al.
patent: 5738797 (1998-04-01), Belke, Jr. et al.
patent: 6005198 (1999-12-01), Gregoire
patent: 6068782 (2000-05-01), Brandt et al.
patent: 6090301 (2000-07-01), Mizukoshi et al.
Jalrazbhoy Vivek Amir
Kneisel Lawrence Leroy
Paruchuri Mohan R.
Stoica Vladimir
Gulakowski Randy
Visteon Global Tech
Visteon Global Tech, Inc.
Winter Gentle E.
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