Data exchange capable of minimizing loss of a data block

Multiplex communications – Wide area network – Packet switching

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370 16, 370 60, H04J 314, H04L 1256

Patent

active

053901630

ABSTRACT:
In a data exchange for use in an asynchronous transfer mode communication system, the data exchange has first and second buffers. An input data block is selectively loaded with the first and the second buffers to be read as first and second output data blocks out of the first and the second buffers. When the first buffer is changed from an active buffer to a stand-by buffer, the input data block is successively loaded with the first and the second buffers to be memorized as first and second buffered data blocks up to a predetermined block number. A test data block is loaded as the input data block with the first and the second buffers. When the second output data block is coincident with the test data block, the second buffer is controlled so that the second output data block is not read out of the second buffer until the first data block is coincident with the test data block. After each of the first and the second output data blocks is coincident with the test data block, the input data block is loaded with only second buffer. Furthermore, the input data block is loaded with only second buffer when the number of the second buffered data block is equal to the predetermined block number even if the first output data block is not coincident with the test data block.

REFERENCES:
patent: 5072440 (1991-12-01), Isono et al.
patent: 5153578 (1992-10-01), Izawa et al.
patent: 5274633 (1993-12-01), Kato et al.
patent: 5280469 (1994-01-01), Taniguchi et al.
patent: 5283782 (1994-02-01), Takase et al.

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