Thin-film solar cell module and method of manufacturing the...

Batteries: thermoelectric and photoelectric – Photoelectric – Panel or array

Reexamination Certificate

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C136S244000, C257S433000, C438S066000, C438S080000, C438S064000

Reexamination Certificate

active

06469242

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Applications No. 11-247123, filed Sep. 1, 1999, No. 11-247124, filed Sep. 1, 1999 and No. 11-251172, filed Sep. 6, 1999; the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
The present invention relates in general to a thin-film solar cell module and a method of manufacturing the same. In particular, this invention relates to an electrode lead-out structure and a method of fabricating the same in a thin-film solar cell module comprising a single thin-film solar cell or a combination of thin-film solar cells. The thin-film solar cell comprises a plurality of photovoltaic (PV) elements formed on a transparent insulating substrate.
Attention has been paid to sunlight power generation as means for overcoming environmental problems such as an exhaustion of natural resources or an increase in generation of carbon dioxide. Thin-film solar cells have attracted particular attention because the amount of semiconductor material to be used, such as silicon, is small.
Solar cells using crystalline silicon substrates have conventionally been put into practice. Compared to the solar cells, thin-film solar cells have a problem in that the efficiency of converting light to power is inferior by several-ten percentage. In an environment in which foot print for placing solar cells is limited, as in Japan, it is very important to increase as much as possible that portion of the area occupied by solar cell modules, which contributes to power generation, thereby reducing the gap in conversion efficiency between the solar cells and the thin-film solar cells.
As regards the solar cell using a crystalline silicon substrate, one solar cell is formed on one crystalline silicon substrate. Several-ten solar cells are connected to constitute a solar cell module. Since it is necessary to provide gaps for disposing a solar cell module and areas for disposing wiring for sending power of solar cell elements to connection means such as a terminal box, the area of a power generation section for converting light to power is set at about 70% to 80% of the entire area of the solar cell module. In the field of thin-film solar cell modules, a structure has been proposed wherein solar cell elements are formed directly on a transparent insulating substrate and the solar cell elements are connected on the substrate (hereinafter referred to as “substrate-integration-type solar cell module”). In the substrate-integration-type solar cell module, the area of the power generation section can be increased to more than 90% of the entire area occupied by the module.
U.S. Pat. No. 4,292,092 discloses a structure of a solar cell portion in the substrate-integration-type solar cell module, and a method of fabricating the same. According to the technique of U.S. Pat. No. 4,292,092, a transparent conductor film is provided on a transparent insulating substrate of, e.g. glass. The transparent electrode film is divided by a laser process into strip-shaped photovoltaic (PV) regions. P-type, i-type and n-type amorphous silicon is provided on the entire surfaces of the PV regions, and thus PV semiconductor layers are formed. Connection grooves for connecting adjacent solar cell elements are formed by a laser process in parallel to and away from a first line formed by a laser process. After a back electrode layer is formed, separation grooves are formed in the back electrode layer in parallel to the connection grooves and opposite to the separation grooves of the transparent conductor film. Through these processes, a thin-film solar cell is fabricated wherein a plurality of strip-shaped photovoltaic (PV) elements are connected in series on a single substrate.
Buses for outputting power from the thin-film solar cell is provided on the transparent insulating substrate. Since the buses are portions not contributing to power generation, they are formed of a material with good electrical conductivity to efficiently deliver generated power and are disposed on strip-shaped bus regions which are slightly narrower than the PV elements. Examples of the method of forming the buses are disclosed in Jpn. Pat. Appln. KOKAI Publication No. 3-171675 wherein a paste in which metallic particles of glass frit, etc. are dispersed is coated on bus regions, or in Jpn. Pat. Appln. KOKAI Publication No. 9-83001 wherein a solder-plated copper foil is disposed on bus regions by means of a solder for ceramics.
The solar cell module using the crystalline silicon substrate and the thin-film solar cell module have each a connection means (hereinafter referred to merely as “the connection means”) for outputting power. A terminal box can be used for the connection means. The terminal box includes terminals, and wiring elements lead out of the solar cell module are connected via the terminals to an output power cable.
According to some examples of the connection structure between the bus and the connection means for the substrate-integration-type solar cell module, copper foils are arranged and connected on such a transparent support member as used in the crystalline silicon substrate solar cell in the same two-dimensional fashion as the crystalline silicon substrate, or a paste in which metallic particles of glass frit, etc. are dispersed is linearly coated on peripheral portions of the transparent insulating substrate where no PV elements are provided, as disclosed in Jpn. Pat. Appln. KOKAI Publication No. 3-171675.
There is such a problem with these methods that due to a large space needed for wiring an area for power generation in the limited area of the solar cell module is occupied.
To overcome this problem, Jpn. Pat. Appln. KOKAI Publication No. 9-326497 proposes a technique wherein wiring (solder-plated copper foils, etc.) for connecting the buses and the connection means is disposed in a filler for sealing photovoltaic (PV) elements. This document describes a prior-art method for maintaining electrical insulation between the wiring (copper foils) and PV elements, wherein an insulating film is used and a filler and a back cover are disposed on the insulating film. This document also describes an embodiment wherein copper foils are coated with insulating films.
The former method will now be described with reference to FIG.
2
. Buses (solder-plated copper foils)
4
,
4
′ are provided on bus regions
3
,
3
′ on a thin-film solar cell
100
. Wiring elements
5
,
5
′ for connecting the buses and the aforementioned connection means are disposed between the solder-plated copper foils
4
,
4
′. An insulating film
7
is provided under the wiring elements
5
,
5
′. The wiring elements
5
,
5
′ (two solder-plated copper foils) are connected at one end to the solder-plated copper foils
4
,
4
′. A filler film
9
and a back protection cover
13
are provided over the wiring elements. Openings
14
for taking out electrodes are formed in the back protection cover
13
. In the state in which the solder-plated copper foils
5
,
5
′ are led out of the back cover via the openings, the back protection cover
13
is thermally pressed with the filler film
9
interposed by means of a vacuum laminator and fixed on a glass substrate
1
.
The latter method described in Jpn. Pat. Appln. KOKAI Publication No. 9-326497 will now be described with reference to FIG.
3
. In
FIG. 3
, the wiring elements
5
,
5
′ are replaced with copper foils
45
,
45
′ formed by coating the two solder-plated copper foils
5
,
5
′ with insulating films
15
. In this method, the insulating film
7
used in the example of
FIG. 2
is not used.
According to a resent research work, it is recognized that the method of Jpn. Pat. Appln. KOKAI Publication No. 3-171675 has a problem in that the characteristics of the solar cell module deteriorate due to a large area required for wiring.
It is also recognized by a modern research that the method shown in
FIG. 2

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