Multi-bit &Dgr;&Sgr; modulator having linear output

Details Multi-bit &Dgr;&Sgr; modulator having linear output Multi-bit &Dgr;&Sgr; modulator having linear output

2000-08-30

2002-08-27

Young, Brian (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Differential encoder and/or decoder

C341S118000, C341S144000, C341S155000

Reexamination Certificate

active

06441759

ABSTRACT:

FIELD OF THE INVENTION
The invention relates to multi bit &Dgr;&Sgr; modulators having feedback loops and wherein the linearity of the output of the modulator is improved.
The invention further relates to methods for improving the linearity of the multi bit &Dgr;&Sgr; modulators.
BACKGROUND AND PRIOR ART
Multi bit &Dgr;&Sgr; modulators are well known and conventionally their outputs are fed back through a multi bit digital to analog converter (DAC). Non-linearity in the quantizer of the modulator is reduced by the gain in the forward loop but does not limit overall modulator linearity. However, non-linearity in the DAC is a serious problem as this is directly referred to the input. To overcome this problem numerous techniques have been developed and primarily rely on switching in a multiplicity of unit DAC cells and shuffling them in some form on each cycle to spread the mismatch error over the entire frequency band.
A number of patents also disclose solutions to the non-linearity problem in multi bit DACs and modulators.
U.S. Pat. No. 5,404,142 discloses a data director scrambler for multi bit noise shaping digital analog converters.
U.S. Pat. No. 5,305,004 discloses a digital to analog converter for &Dgr;&Sgr; modulators.
U.S. Pat. No. 5,684,482 discloses spectral shaping of circuit errors in digital to analog converters.
U.S. Pat. No. 5,406,283 discloses multi bit over-sampled digital to analog converters with dynamic element matching.
The prior art techniques utilize a multi bit DAC composed of multiple one bit digital analog converters in the feedback path and circuitry which selects the DAC combinations to be used at any given time. The main problem with these solutions is that an excessive amount of extra circuitry is required to implement the technique. Additionally the techniques are limited to the energy they can actually disperse over the frequency band.
Reference is next made to
FIG. 1
which shows a conventional &Dgr;&Sgr; modulator circuit
1
in which a multi bit quantizer Q is connected in a feedback loop FL containing a multi bit DAC. Non-linearity and DC offsets in the quantizer Q are not significant as the quantizer is usually preceded by several high gain stages and the input referred error is thus reduced by this gain. However, non-linearities in the DAC in the feedback loop are directly input referred and critical in determining overall modulator linearity.
If N is assumed to be the output of the M bit quantizer, conventional techniques for removal of non-linearity in the DAC are based on having multiple unit DACs and then selecting N of these units randomly or in some preset fashion. Mismatch between the error is noise shaped. Both techniques require a multi bit DAC in the feedback loop as well as extra logic elements, such as the shuffle logic shown in
FIG. 1
to determine which of the units are chosen.
SUMMARY OF THE INVENTION
An object of the invention is to provide a &Dgr;&Sgr; modulator of simple construction in which linearity is improved.
Multi bit &Dgr;&Sgr; modulators are becoming more wide spread in use as the demand for higher signal to noise ratios increases and the solution of the nonlinearity problem associated with the multi bit &Dgr;&Sgr; modulators is a significant achievement of the invention.
In accordance with the invention, a single bit DAC is included in the feedback loop which is inherently linear by definition. The multi bit output of the modulator is converted to a single bit output in the time domain by using a clock frequency higher than the sampling frequency. The multi bit output is converted either to a stream of N single pulses or a pulse width corresponding to N (where N is a number representing the output of the multi bit quantizer). Such a transformation can be performed easily with minimal circuit complexity and is readily suited to ultra fast circuit technology. Accordingly, a multi bit &Dgr;&Sgr; modulator is obtained which is substantially more linear, but which requires minimal complexity compared to conventional modulators.


REFERENCES:
patent: 4990914 (1991-02-01), Giancarlo
patent: 5073777 (1991-12-01), Fukuhara et al.
patent: 5181032 (1993-01-01), Ribner
patent: 5305004 (1994-04-01), Fattaruso
patent: 5311181 (1994-05-01), Ferguson et al.
patent: 5404142 (1995-04-01), Adams et al.
patent: 5406283 (1995-04-01), Leung
patent: 5493297 (1996-02-01), Nguyen et al.
patent: 5659315 (1997-08-01), Mandl
patent: 5684482 (1997-11-01), Galton
patent: 5719573 (1998-02-01), Leung et al.
patent: 6021172 (2000-02-01), Fossum et al.

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