Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Reexamination Certificate
1999-08-31
2002-04-23
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
C438S634000, C438S437000
Reexamination Certificate
active
06376381
ABSTRACT:
TECHNICAL FIELD
The present invention relates to methods, planarizing solutions and apparatuses for planarizing microelectronic substrate assemblies in mechanical and/or chemical-mechanical planarization.
BACKGROUND OF THE INVENTION
Mechanical and chemical-mechanical planarizing processes (collectively “CMP”) are used in the manufacturing of electronic devices for forming a flat surface on semiconductor wafers, field emission displays, and many other microelectronic substrate assemblies. CMP processes generally remove material from a substrate assembly to create a highly planar surface at a precise elevation in the layers of material on the substrate assembly.
FIG. 1
schematically illustrates a rotary CMP machine
10
for planarizing a microelectronic substrate assembly
12
. The rotary machine
10
has a platen
20
, a wafer carrier assembly
30
above the platen
20
, and a polishing pad
40
between the platen
20
and the carrier assembly
30
. The carrier assembly
30
generally includes a head
32
to pick up, hold and release the substrate assembly
12
at different stages of the planarizing process. The carrier assembly
30
can also include a backing pad
34
to support the back side of the substrate assembly
12
. The head
32
may be a weighted, free-floating unit (not shown), or the carrier assembly
30
can further include an actuator
36
attached to the head
32
to impart axial and/or rotational motion (indicated by arrows C and D, respectively).
The polishing pad
40
can be a non-abrasive polymeric pad (e.g., polyurethane), or it may be a fixed-abrasive polishing pad in which abrasive particles are fixedly dispersed in a resin or another type of suspension medium. A planarizing fluid
44
covers the polishing pad
40
during planarization of the substrate assembly
12
. The planarizing fluid
44
may be a conventional CMP slurry with abrasive particles that etch and/or oxidize the surface of the substrate assembly
12
, or the planarizing fluid
44
may be a “clean” non-abrasive planarizing solution without abrasive particles. Abrasive planarizing solutions can also include surfactants to help suspend the abrasive particles in the solution. For example, Brij
58
, ZONYL and other surfactants have been commercially used in only slurries with abrasive particles. In most CMP applications, abrasive slurries with abrasive particles are used on non-abrasive polishing pads, and non-abrasive cleaning solutions without abrasive particles are used on fixed-abrasive polishing pads.
To planarize the substrate assembly
12
with the CMP machine
10
, the carrier assembly
30
presses the substrate assembly
12
face-downward against a planarizing surface
42
of the polishing pad
40
. At least one of the platen
20
or the head
32
moves relative to the other to move the substrate assembly
12
across the planarizing surface
42
in the presence of the planarizing solution
44
. As the face of the substrate assembly
12
moves across the planarizing surface
42
, the polishing pad
40
and/or the planarizing solution
44
continually remove material from the face of the substrate assembly
12
.
CMP processes should consistently and accurately produce a uniform, planar surface on substrate assemblies to enable circuit and device patterns to be formed with photolithography techniques. As the density of integrated circuits increases, it is often necessary to accurately focus the critical dimensions of the photo-patterns to within a tolerance of approximately 0.1 &mgr;m. Focusing photo-patterns to such small tolerances, however, is difficult when the planarized surfaces of substrate assemblies are not uniformly planar. Thus, to be effective, CMP processes should create highly uniform, planar surfaces on substrate assemblies.
In the highly competitive semiconductor industry, it is also desirable to maximize the throughput of CMP processing by producing a planar surface on a substrate assembly as quickly as possible. The throughout of CMP processing is a function of several factors, one of which is the ability to accurately stop CMP processing at a desired endpoint. In a typical CMP process, the desired endpoint is reached when the surface of the substrate assembly is planar and/or when enough material has been removed from the substrate assembly to form discrete components on the substrate assembly (e.g., shallow trench isolation areas, contacts, damascene lines, etc.). Accurately stopping CMP processing at a desired endpoint is important for maintaining a high throughput because the substrate assembly may need to be re-polished if it is “under-planarized,” or too much material can be removed from the substrate assembly if it is “over-polished.” For example, over-polishing can cause “dishing” in shallow-trench isolation structures or completely destroy a section of the substrate assembly. Thus, it is highly desirable to stop CMP processing at a desired endpoint within the substrate assembly.
One technique to endpoint CMP processing and to form a planar surface on a substrate assembly is to provide stop-on-feature (SOF) wafer structure having a polish-stop layer and a cover layer on the polish-stop layer. The polish-stop layer follows the contour of trenches or components on the wafer such that the polish-stop layer has high areas at the desired endpoint of the CMP process. The cover layer fills depressions in the polish-stop layer and covers the high areas on the polish-stop layer. The cover layer is generally softer than the polish-stop layer so that the polish-stop layer has a much lower polishing rate than the cover layer. For example, the polish-stop layer can be composed of silicon nitride or carbon, and the cover layer can be composed of a metal, silicon dioxide or polysilicon.
During planarization of an SOF wafer, certain high areas of the polish-stop layer are typically exposed before other high areas, such that some of the high areas remain covered by the cover layer. The harder polish-stop layer inhibits mechanical removal of material from the exposed high areas while the abrasive particles still aggressively remove material from the thicker portions of the softer cover layer. The polish-stop layer theoretically endpoints the CMP process when all of the high areas of the polish-stop layer are exposed.
One drawback of CMP processing with an SOF wafer is that the difference in polishing rate between the polish-stop layer and the cover layer may not be adequate to stop planarization at the polish-stop layer. For example, the first areas of the polish-stop layer that are exposed during planarization may be completely removed before the cover layer is removed from the other high areas of the polish-stop layer at the same elevation. This drawback is particularly problematic when using fixed-abrasive polishing pads because the fixed-abrasive particles aggressively remove material from the substrate assembly. Consequently, the difference in hardness between the polish-stop layer and the cover layer may not be adequate to effectively shut down planarization at the high areas of the polish-stop layer in fixed-abrasive CMP applications.
SUMMARY OF THE INVENTION
The present invention is directed toward planarizing solutions, planarizing machines and methods for planarizing semiconductor wafers, field emission displays and other microelectronic substrate assemblies. One method in accordance with the invention includes pressing a substrate assembly against a planarizing surface of a fixed-abrasive polishing pad, covering an operative portion of the planarizing surface with a non-abrasive planarizing solution, and moving the substrate assembly and/or the polishing pad with respect to the other. The fixed-abrasive polishing pad generally includes a body having a suspension medium and abrasive particles fixedly attached to the suspension medium at the planarizing surface. The substrate assembly is a stop-on-feature device including a substrate, a polish-stop layer formed over the substrate to conform to a topography of features on the substrate, and a cover layer formed over the
Bowers Charles
Kielin Erik
Micro)n Technology, Inc.
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