Single-crystal – oriented-crystal – and epitaxy growth processes; – Processes of growth from liquid or supercritical state – Having pulling during growth
Reexamination Certificate
2000-06-19
2002-10-01
Kunemund, Robert (Department: 1765)
Single-crystal, oriented-crystal, and epitaxy growth processes;
Processes of growth from liquid or supercritical state
Having pulling during growth
C117S014000, C117S015000, C117S020000, C117S030000, C117S207000, C117S932000
Reexamination Certificate
active
06458202
ABSTRACT:
BACKGROUND OF THE INVENTION
In general, the present invention relates to the preparation of a single crystal silicon ingot according to the Czochralski method. In particular, the invention relates to a process for controlling the thermal history of the ingot as it is grown in order to limit the density and size of vacancy-related agglomerated defects in, and improve the gate oxide integrity of, wafers obtained therefrom.
Single crystal silicon, which is the starting material in most processes for the fabrication of semiconductor electronic components, is commonly prepared by the so-called Czochralski (“Cz”) method. In this method, polycrystalline silicon (“polysilicon”) is charged to a crucible and melted, a seed crystal is brought into contact with the molten silicon and a single crystal is grown by slow extraction. After formation of a neck is complete, the diameter of the crystal is enlarged by decreasing the pulling rate and/or the melt temperature until the desired or target diameter is reached. The cylindrical main body of the crystal which has an approximately constant diameter is then grown by controlling the pull rate and the melt temperature while compensating for the decreasing melt level. Near the end of the growth process but before the crucible is emptied of molten silicon, the crystal diameter must be reduced gradually to form an end-cone. Typically, the end-cone is formed by increasing the crystal pull rate and heat supplied to the crucible. When the diameter becomes small enough, the crystal is then separated from the melt.
In recent years, it has been recognized that a number of defects in single crystal silicon form in the growth chamber as the ingot cools from the temperature of solidification. More specifically, as the ingot cools intrinsic point defects, such as crystal lattice vacancies or silicon self-interstitials, remain soluble in the silicon lattice until some threshold temperature is reached, below which the given concentration of intrinsic point defects becomes critically supersaturated. Upon cooling to below this threshold temperature, a reaction or agglomeration event occurs, resulting in the formation of agglomerated intrinsic point defects.
It has previously been reported (see, e.g., PCT/US98/07365 and PCT/US98/07304) that the type and initial concentration of these point defects in the silicon are determined as the ingot cools from the temperature of solidification (i.e., about 1410° C.) to a temperature greater than about 1300° C. (i.e., about 1325° C., 1350° C. or more). That is, the type and initial concentration of these defects are controlled by the ratio v/G
0
, where v is the growth velocity and G
0
is the average axial temperature gradient over this temperature range. Specifically, for increasing values of v/G
0
, a transition from decreasingly self-interstitial dominated growth to increasingly vacancy dominated growth occurs near a critical value of v/G
0
which, based upon currently available information, appears to be about 2.1×10
−5
cm
2
/sK, where G
0
is determined under conditions in which the axial temperature gradient is constant within the temperature range defined above. Accordingly, process conditions, such as growth rate and cooling rate (which affect v), as well as hot zone configurations (which affect G
0
), can be controlled to determine whether the intrinsic point defects within the single crystal silicon will be predominantly vacancies (where v/G
0
is generally greater than the critical value) or self-interstitials (where v/G
0
is generally less than the critical value).
Defects associated with the agglomeration of crystal lattice vacancies, or vacancy intrinsic point defects, include such observable crystal defects as D-defects, Flow Pattern Defects (FPDs), Gate Oxide Integrity (GOI) Defects, Crystal Originated Particle (COP) Defects, and crystal originated Light Point Defects (LPDs), as well as certain classes of bulk defects observed by infrared light scattering techniques (such as Scanning Infrared Microscopy and Laser Scanning Tomography). Also present in regions of excess vacancies are defects which act as the nuclei for the formation of oxidation induced stacking faults (OISF). It is speculated that this particular defect is a high temperature nucleated oxygen agglomerate catalyzed by the presence of excess vacancies.
Once the “agglomeration threshold” is reached, intrinsic point defects, such as vacancies, continue to diffuse through the silicon lattice as long as the temperature of that portion of the ingot remains above a second threshold temperature (i.e., a “diffusivity threshold”), below which intrinsic point defects are no longer mobile for commercially practical periods of time. While the ingot remains above this temperature, vacancy intrinsic point defects diffuse through the crystal lattice to sites where agglomerated vacancy defects are already present, effectively causing a given agglomerated defect to grow in size. These agglomerated defect sites essentially act as “sinks,” attracting and collecting vacancy intrinsic point defects, because of the more favorable energy state of the agglomeration.
Accordingly, the formation and size of such agglomerated vacancy defects are dependent upon the thermal history, and more specifically the cooling rate or residence time, of the main body of the ingot over the range of temperatures from the “agglomeration threshold” to the “diffusivity threshold.” For example, high cooling rates typically result in the silicon ingot having a large number of agglomerated vacancy defects which are relatively small in diameter. Such conditions are favorable, for example, with respect to light point defects (LPDs) because integrated circuit manufactures typically require that the number of such defects in excess of about 0.2 microns in size not exceed about 20 for a 200 mm diameter wafer. However, such conditions are unfavorable because they typically yield wafers having an unacceptable gate oxide integrity (GOI); that is, such conditions result in wafers having a large number of small agglomerated vacancy defects which negatively impact gate oxide integrity. In contrast, slow cooling rates typically result in the ingot having a few very large agglomerated vacancy defects, thus yielding wafers with acceptable GOI values but unacceptable LPD results.
The problems associated with agglomerated vacancy defects are further complicated by the fact that the cooling rate of the ingot is often not uniform over the length of the main body. As a result, the size and concentration of defects in the wafers obtained from such an ingot will not be the same. This variation in the wafers obtained from a single ingot creates problems for those who have proposed to remove such agglomerated defects subsequent to their formation. More specifically, some have proposed to annihilate defects formed in ingots grown at a high pull rate by heat treating the silicon in wafer form. For example, Fusegawa et al. propose, in European Patent Application 503,816 A1, growing the silicon ingot at a growth rate in excess of 0.8 mm/minute, and heat treating the wafers which are sliced from the ingot at a temperature in the range of 1150° C. to 1280° C. to annihilate the defects which form during the crystal growth process. Such heat treatments have been shown to reduce the defect density in a thin region near the wafer surface. However, the specific conditions needed will vary depending upon, among other things, the concentration and location of the defects. For example, such heat treatments may successfully dissolve agglomerated vacancy defects in wafers obtain from portions of the ingot near the seed-cone but not in wafers obtained from portions of the ingot near the end-cone. Accordingly, treating wafers obtained from ingots having a nonuniform axial thermal history, and thus a nonuniform axial concentration of agglomerated defects, requires different processing conditions. As a result, such wafer heat treatments are uneconomical. Furthermore, these treatments have the potential for introducing
Ishii Yasuhiro
Kojima Makoto
MEMC Electronic Materials , Inc.
Senniger Powers Leavitt & Roedel
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