Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Reexamination Certificate
1998-05-29
2002-11-05
Thomas, Tom (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Bump leads
C257S772000, C257S778000, C257S781000
Reexamination Certificate
active
06476486
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to ball grid arrays and more specifically to enhancing the performance of an integrated circuit mounted in a ball grid array.
BACKGROUND OF THE INVENTION
Ball grid arrays (BGA) and the like are a known type of integrated circuit package. A typical ball grid array includes a platform having a die attachment region provided thereon. The area in which the die attachment region is located is generally referred to as the cavity, while the peripheral area around the cavity is generally referred to as the border. A plurality of contact pads are usually placed towards the periphery of the cavity and these pads are connected by internal conductors to conductive “balls” on the backside (underside when mounted) of the platform. The conductive balls are normally arranged in a grid pattern, hence the name ball grid array, and provide a relatively low inductance electrical connection between the contact pads of the cavity and the traces of a printed circuit board or the like.
Ball grid arrays were developed as a mechanism that (1) facilitates efficient placement, interchangeability and test of integrated circuits and (2) reduces the parasitic lead inductance associated with prior integrated circuit to printed circuit board mountings. Perhaps as a result of this historical development, ball grid arrays are typically viewed merely as a package providing electrical conduits that distribute the pin out of an integrated circuit to appropriate locations on a printed circuit board. Electronic devices that enhance the performance of an integrated circuit, such as filters, regulators, sensors, protection and noise suppression circuits, etc., have conventionally been placed on the printed circuit board to which the integrated circuit and ball grid array are mounted or they are fabricated in the silicon (or other semiconductor material) of the integrated circuit. This practice, however, is disadvantageous in that it uses up valuable printed circuit board and/or integrated circuit real estate. In an effort to alleviate this problem (i.e., to conserve real estate), a designer may choose not to include the componentry, though this results in poorer circuit performance. A need thus exists to utilize ball grid arrays as more than a mere package of distributed conduits in which signal processing is not provided.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide an integrated circuit package such as a ball grid array package that includes one or more supplemental electronic components that enhance the performance of an integrated circuit within the ball grid array package.
It is another object of the present invention to provide an integrated circuit package such as a ball grid array package that has a passive and/or active electronic device provided thereon or therein.
It is another object of the present invention to provide an integrated circuit package such as a ball grid array in which external components are placed close to the integrated circuit, thereby reducing parasitic affects and coupling noise, etc.
It is another object of the present invention to provide an integrated circuit package that affords a low cost, easily implemented manner of providing additional electronic functions inside of the package.
It is also an object of the present invention to provide an integrated circuit package that includes componentry previously placed on a printed circuit board to permit reduction of the size of the printed circuit board and the product in which the printed circuit board is mounted.
These and related objects of the present invention are achieved by use of a ball grid array package with supplemental electronic components as described herein.
In one embodiment, the present invention includes a low inductance integrated circuit package having a platform; a die attachment region formed on a first side of the platform; a plurality of low inductance mounting members form on a second substantially opposite side of the platform; and a supplemental electronic device provided on said first side of the platform that enhances performance on an integrated circuit in said die attachment region.
In another embodiment, the present invention includes a ball grid array apparatus having a platform with a cavity formed on a first side thereof; a die attachment region formed in said cavity; a plurality of low inductance balls formed on a second substantively opposite side of the platform; a ground and a power conductor provided adjacent said die attachment region; and an electronic device coupled to one of said contact pads and provided proximate said die attachment region.
The electronic device may be any passive or active device and may include a resistor, an inductor, a resistor-capacitor circuit, a resistor-capacitor-inductor circuit, an inductor-capacitor circuit, a diode, a Zener diode, and/or a capacitor. In addition the device may be a sensor, a voltage regulator, a chip based device or another electronic device. Provision of the device on a low inductance integrated circuit mounting package provides a cost effective manner of enhancing the performance of an integrated circuit provided in such a package.
A method of forming a low inductance integrated circuit package is also presented.
REFERENCES:
patent: 5103283 (1992-04-01), Hite
patent: 5272590 (1993-12-01), Hernandez
patent: 5311057 (1994-05-01), McShane
patent: 5431332 (1995-07-01), Kirby et al.
patent: 5468999 (1995-11-01), Lin et al.
patent: 5640047 (1997-06-01), Nakashima
patent: 5640048 (1997-06-01), Selna
patent: 5729053 (1998-03-01), Orthmann
patent: 5739588 (1998-04-01), Ishida et al.
patent: 5787575 (1998-08-01), Benerjee et al.
patent: 5795799 (1998-08-01), Hosoya
patent: 5798567 (1998-08-01), Kelly et al.
patent: 5811880 (1998-09-01), Banerjee et al.
patent: 5818699 (1998-10-01), Fukuoka
patent: 5831810 (1998-11-01), Bird et al.
Humphrey Tamio
Salcido, Jr. Salvador
Agilent Technologie,s Inc.
Nadav Ori
Thomas Tom
LandOfFree
Ball grid array package with supplemental electronic component does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Ball grid array package with supplemental electronic component, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Ball grid array package with supplemental electronic component will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2919135