Optical: systems and elements – Deflection using a moving element – Using a periodically moving element
Reexamination Certificate
1999-03-19
2002-11-05
Chan, Jason (Department: 2633)
Optical: systems and elements
Deflection using a moving element
Using a periodically moving element
C359S199200, C375S317000, C375S318000, C327S514000, C327S515000
Reexamination Certificate
active
06476954
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention generally relates to an optical communication device, and, more particularly, to a power saving optical communication device and an amplifier of a receiving circuit which converts a current signal according to received light to a voltage signal.
An optical communication device for performing data communication is put to practical use, for example, using infrared rays. The optical communication device includes a receiving circuit for converting received light to a current signal. The receiving circuit includes an amplifier for converting the current signal to a voltage signal and a comparator for converting the voltage signal to a digital signal. In order to improve the receiving accuracy, the receiving circuit sets the current-to-voltage conversion rate in the amplifier and sets the clamping operation point of the current signal.
FIG. 1
is a schematic circuit diagram of a conventional receiving circuit
50
. The anode of a photodiode PD is connected to ground GND, and its cathode is connected to an input terminal of an amplifier
11
via an input terminal P
in
. The photodiode PD generates a diode current IPD that corresponds to received light. The amplifier
11
converts the diode current IPD to a voltage Vout. A resistor Rf and a clamping circuit
12
are connected in parallel between the I/O terminals of the amplifier
11
. The output voltage Vout of the amplifier
11
is supplied to the positive input terminal of a comparator
13
via an output terminal Pout and is supplied to the clamping circuit
12
. The output voltage Vout may also be amplified by an amplifier having plural stages to compensate for an insufficient gain.
The clamping circuit
12
may be an npn type bipolar transistor Tr
1
. The transistor Tr
1
has a base for receiving the output voltage Vout, a collector for receiving the voltage of a power supply Vcc, and an emitter connected to the input terminal P
in
.
The comparator
13
receives the output voltage Vout supplied to its positive input terminal and a threshold voltage Vth supplied to its negative input terminal and converts the output voltage Vout to a digital signal. The digital signal is supplied to an internal circuit (not illustrated) of the optical communication device as a reception signal RX. The threshold voltage vth varies in accordance with the output voltage Vout.
The photodiode PD, as shown in
FIG. 2
, generates the diode current IPD that corresponds to the received light. The amplifier
11
converts the diode current IPD to the output voltage Vout. At this time, the output voltage Vout is given by the following equation.
Vout=
IPD×Rf
In other words, the output voltage Vout can be obtained by multiplying the diode current IPD by the resistance of the resistor Rf. The current-to-voltage conversion rate (so-called transformer impedance) of the amplifier
11
is substantially equal to the resistance of the resistor Rf. The comparator
13
converts the output voltage Vout to the digital signal (reception signal) RX.
When the diode current IPD increases, the inter-terminal voltage of the resistor Rf increases. When the diode current IPD exceeds a predetermined value and the inter-terminal voltage of the resistor Rf exceeds the voltage VBE between the base and emitter of the transistor Tr
1
(IPD×Rf>VBE), the transistor Tr
1
is turned on. Hereupon, the voltage of the power supply Vcc is supplied to the input terminal of the amplifier
11
via the transistor Tr
1
, the inter-terminal voltage of the resister Rf drops, and the output voltage Vout of the amplifier
11
is substantially clamped to the voltage VBE between the base and the emitter. Thus, when the output voltage Vout increases, the output voltage Vout is clamped to the predetermined clamping voltage VCL (VBE) by the clamping circuit
12
.
The transformer impedance and the operation point of the clamping circuit
12
are set by the single resistor Rf. However, when the resistor Rf has a relatively high resistance in order to improve the transformer impedance, following disadvantages (a) and (b) arise.
(a) Disadvantage in High-speed Communication
The operation delay time of the transistor Tr
1
is prolonged as the resistance of the resistor Rf increases. Accordingly, when the level of the received light and the diode current IPD are high, the clamping operation of the clamping circuit
12
is delayed. As a result, as shown in
FIG. 2
, when the output voltage Vout rises, an overshoot is generated and the signal waveform of the output voltage Vout is disturbed. Further, because of the large resistance of the resistor Rf, the falling edge of the output voltage Vout becomes slow, and the comparator
13
outputs a reception signal having a long H-level width.
(b) Disadvantage when a Direct Current Component is Contained in the Diode Current IPD
When natural light is contained in the received light, as shown in
FIG. 3
, the diode current IPD contains a direct current component IPD-DC. In other words, the diode current IPD is offset by the direct current component IPD-DC. In this case, the output voltage Vout tend to be clamped by the direct current component IPD-DC. That is, the output voltage Vout that should not be clamped is clamped. Accordingly, the output voltage Vout is not obtained accurately and the comparator
13
outputs an erorrneous reception signal RX.
Optical communication devices are installed in electronic devices, such as personal computers, PDA (personal digital assistants), and digital still cameras. To reduce the power consumption of such optical communication devices, an optical communication device that automatically adjusts transmission output levels according to certain factors, such as the communication distance and communication state is proposed.
FIG. 4
is a schematic block diagram of a conventional optical communication device
60
. The optical communication device
60
includes a receiving circuit
210
a
and a transmitting circuit
210
b
. The receiving circuit
210
a
has a photodiode
211
, an amplifier
212
, and a comparator
213
. The transmitting circuit
210
b
has a current driver
214
and a light-emitting diode
215
.
The current driver
214
converts a transmission signal TX from an internal circuit to a current signal and amplifies the current signal to generate a transmission current Idrv. The light-emitting diode
215
repeats emission and extinction according to the transmission current Idrv. When the emission level of the photodiode
211
is high, an emission control unit
216
determines that the communication distance is short or the communication state is good and controls the current driver
214
so that the emission level of the light-emitting diode
215
decreases. When the received light level is low, the emission level control unit
216
determines that the communication distance is far or the communication state is not preferable and controls the current driver
214
so that the emission level of the light-emitting diode
215
increases. Such control reduces the power consumption of the optical communication device
210
.
Specifically, the emission level control unit
216
includes an emission level detection circuit
216
a
, a control circuit
216
b
, an arithmetic circuit
216
c
, and an emission level adjustment circuit
216
d
. The emission level detection circuit
216
a
receives a voltage signal VA of the amplifier
212
and supplies a detection signal SG
1
that corresponds to the level of the voltage signal VA to the control circuit
216
b
. The arithmetic circuit
216
c
receives the detection signal SG
1
via the control circuit
216
b
and calculates the level of the received light. The arithmetic circuit
216
c
further determines the communication distance and the communication state based on the received light level and determines the emission level and emission timing of the light-emitting diode
215
. The control circuit
216
b
supplies a control signal SG
2
to the emission level adjustment circuit
216
d
based on the determined emission leve
Arent Fox Kintner Plotkin & Kahn
Chan Jason
Fujitsu Limited
Tran Dzung
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