Sense amplifier with dual linearly weighted inputs and...

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude

Reexamination Certificate

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C327S052000, C327S053000

Reexamination Certificate

active

06396308

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to amplifiers used in communication circuits. More particularly, the present invention relates to a sense amplifier with multiple linear weighted inputs, which may be used, for example, in communication systems,
Providing a broadband linear weighting of two signals is an important signal processing function. In communication circuits, for example, echo cancellation, or decision feedback equalization circuits synthesize and linearly subtract a correction signal from a communication signal in order to remove noise and/or errors.
It is difficult to perform linear weighting of signals. One solution would be to use linear resistors in the form of a resistor divider to perform the weighting. Unfortunately, this method has the effect of loading the input signals with a resistive load. This is undesirable, since it could imbalance the loading and hence the responses of the signals being weighted. For example, any shared signal being weighted against a plurality of signals could not support this kind of additional loading. Other problems arise by using resistors for linear weighting. For example, for an integrated solution using CMOS digital technology, it is difficult to manufacture linear resistances that consume a small area and do not add a significant amount of parasitic capacitance to the circuit.
Another solution would be to use ratioed closed-loop amplifiers. Closed-loop amplifiers (e.g. op-amps), like the resistor divider approach, require linear resistors. So, this solution has the same drawback as the resistor divider approach. Additionally, other non-linearities attributable to, for example, offset voltages and the finite gain of the closed-loop amplifier limit the overall linearity of the circuit. Closed-loop amplifiers also have a limited frequency response, which limits the broadband performance of the circuit. For these reasons, therefore, closed loop amplifiers do not provide a desirable solution for performing weighting linearly.
Yet another solution would be to use an open-loop amplifier. However, this solution has drawbacks as well. Like the closed-loop approach, open loop amplifiers are highly non-linear at high frequencies. So, the broadband performance of such a circuit is limited. Additionally, because most active circuit elements of an open-loop amplifier are non-linear, it would be difficult to construct a linear solution.
After the signals are linearly weighted into a linearly weighted signal, the weighted signal needs to be sampled and threshold amplified to a binary digital signal. Accordingly, it would be useful from a complexity, power, and area standpoint if a circuit was provided that combines the linear weighting function described above with the sampling and threshold amplification functions. Additionally, isolation between the signals being weighted would be desirable and hence there is a need for a technique that provides isolation between the linearly weighted signal and the input signals. Finally, in order to allow the circuit to work in low cost digital CMOS technology, it would be desirable to provide a technique that compensates for the large transistor mismatches, which are sometimes seen in digital CMOS technologies.
SUMMARY OF THE INVENTION
Generally, it is an object of the present invention to provide a sense amplifier having dual differential inputs, which accept differential analog input signals that are “fused” to provide a weighted signal, which is digitally representative of the differential analog input voltages.
According to a first aspect of the invention, a sense amplifier comprises a first coupled set of n regenerative amplifiers having a first terminal and a second terminal configured to accept a first differential input signal, where n is an integer greater than or equal to one; a second coupled set of m regenerative amplifiers having a first terminal and a second terminal configured to accept a second differential input signal, where m is an integer greater than or equal to one; means for selectively coupling a power supply to the first and second sets so that the n and m regenerative amplifiers produce a first voltage (V
1
) across the first and second terminals of the n regenerative amplifiers and a second voltage across the m regenerative amplifiers; and a fusing circuit configured to connect the first terminal of the n regenerative amplifiers to the first terminal of the m regenerative amplifiers and to connect the second terminal of the n regenerative amplifiers to the second terminal of the m regenerative amplifiers to produce a final differential output voltage dependent upon a fusion of the first and second voltages.
In a second aspect of the invention, a sense amplifier comprises a first regenerative amplifier configured to selectively accept a first signal on a first regeneration node, a second regenerative amplifier configured to selectively accept a second signal on a second regeneration node, and a fusing circuit selectively coupled to the first and second regeneration amplifiers. The fusing circuit is operable to connect the first regeneration node to the second regeneration node, when the fusing circuit is coupled, to produce a final voltage.
In a third aspect of the invention, a sense amplifier comprises a first plurality of sense amplifier blocks, which are configured to accept a plurality of differential input signals, and a fusing circuit that is selectively coupled to the plurality of sense amplifier blocks. The fusing circuit is operable to fuse two or more of the plurality of differential input signals and provide a weighted output signal that is digitally representative of the two or more of the plurality of differential input signals.
In a fourth aspect of the invention, an input offset voltage cancellation circuit for controlling an input offset voltage at an input of an amplifier comprises a coupling capacitor having a first terminal coupled to an input of an amplifier and a second terminal selectively coupled to an electrical signal having at least one voltage transition, which produces a change in an offset voltage at the input of the amplifier.
A further understanding of the nature and advantages of the inventions herein may be realized by reference to the remaining portions of the specification and the attached drawings.


REFERENCES:
patent: 5065363 (1991-11-01), Sato et al.
patent: 5487043 (1996-01-01), Furutani et al.
patent: 5594681 (1997-01-01), Taguchi
patent: 6134165 (2000-10-01), Spence
patent: 6292030 (2001-09-01), Shih
Yang, et al., A 0.8-&mgr;m CMOS 2.5 Gb/s Oversampling Receiver and Transmitter for Serial Links, IEEE Journal of Solid-State Circuits, vol. 31, No. 12, Dec. 1996.
Song, et al., NRZ Timing Recovery Technique for Band-Limited Channels, IEEE Journal of Solid-State Circuits, vol. 32, No. 4, Apr, 1997.

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