Method for selective etching of oxides

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

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C134S001200, C134S001300, C156S345420, C216S067000, C216S069000, C216S079000, C438S727000, C438S743000

Reexamination Certificate

active

06372657

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to the field of semiconductor integrated circuits and, in particular, to a method for selectively etching of oxides.
BACKGROUND OF THE INVENTION
During etching of a contact opening in an insulating layer on a wafer, a native oxide residue, for example silicon dioxide, often remains, particularly at the bottom of the opening. This native oxide residue must be removed before a conductor is deposited in the opening, as the oxide residue will undesirably increase resistance and inhibit current flow through the conductor. The semiconductor surface must also be passivated by hydrogen to further prevent its reoxidation after the removal of the native oxide.
Wet etch cleaning processes have been commonly used for the removal of native oxides and the passivation of the semiconductor surfaces, mainly because wet etches are conventionally used for etching windows in insulating layers, such as silicon dioxide layers. Typically, a buffered oxide etch (BOE) solution containing hydrofluoric acid (HF) is employed for the etching and cleaning of both thermally grown films and deposited SiO
2
films. At room temperature, HF etches silicon dioxide much faster than it etches the photoresist or the underlying silicon. The etch rate in BOE ranges from 10 to 100 nm/min at 25° C., depending on the density of the silicon dioxide film. Etch rates also depend on the type of oxide present. As such, silicon dioxide grown in dry oxygen has a slower etch rate than that of the silicon oxide grown in the presence of water. Further, a high concentration of phosphorus in the oxide enhances the etch rate, whereas a high boron concentration reduces the oxide etch rate.
Removal of native oxides, particularly that of silicon dioxide, by a wet chemical cleaning poses two important drawbacks. First, both HF and BOE have poor wetting characteristics on silicon surfaces. As such, conventional wet treatments do not offer reliable processes for cleaning semiconductor surfaces having fine patterns, mainly because viscosity and surface tension of these wet etch solutions prevent, many times, die chemicals from reaching the bottoms of contact openings of such fine patterns. Usually, the native oxide formed at the bottom of an opening with a high aspect ratio (ratio between trench depth and trench diameter) cannot be easily removed by a wet cleaning process simply because surface tension makes it difficult for the etchant to enter the opening.
Second, before the HF/BOE solution reaches the bottom of the openings to remove the native oxides, the sidewalls of die openings tend to be damaged. Thus, in contact hole cleaning at the sub-quarter micron regime uncontrolled increases in tie diameter of the contact holes, known as critical dimension (CD) losses, are common during the wet cleaning process.
FIG. 1
illustrates a contact opening
22
formed according to well-known photolithography processes in an insulating layer
24
of, for example, BPSG that has been applied over a semiconductor substrate
20
. In contact opening
22
a bit line conductor (not shown) of for example tungsten (W) will be later formed, as known in the art. As also known in the art, a barrier layer (not shown), formed of a metal such as titanium (Ti) is first applied on surface
21
of tie contact opening
22
prior to the formation of the bit line connector. Since, as explained above, a native oxide
23
(FIG.
1
), such as silicon oxide (SiO
2
), is formed on the surface
21
of the contact opening
22
during and after its formation, a wet cleaning step is typically performed to remove native oxide
23
prior to the formation of such barrier layer.
FIG. 2
shows how removal of the native oxide
23
increases the diameter D of the contact opening
22
. This change is illustrated by the change in critical dimension CD, that is, &Dgr;CD 25 formed as a result of the wet cleaning processes of the prior art.
FIG. 3
exemplifies the time dependency of the change in the critical dimension (&Dgr;CD) for the contact opening
22
of
FIG. 1
, which undergoes a modified BOE wet etching treatment used in the prior art. As shown in the graph of
FIG. 3
, the BOE treatment gives an increase in CD because it etches the adjacent insulating layer
24
(FIG.
1
). For example, even for a low dipping time, such as t
1
of approximately 25 seconds, the change in the critical dimension &Dgr;CD
1
is high, of about 180 Angstroms. This increase in the diameter of the contact opening
22
also impacts the displacement of the metal atoms that fill the contact opening. Thus, in addition to the loss in critical dimension and penetration uniformity, electrical contacts may also become unreliable.
To overcome the problems associated with wet cleaning of native oxides in contact holes, the semiconductor industry has begun using dry etch processes, such as a plasma etch or ion-assisted etch, which are largely anisotropic and unidirectional. Several attempts have been made to remove native oxides, in particular silicon oxide (SiO
2
), from their corresponding contact openings. For example, Nishino et al. teach a method for the removal of native oxides from silicon surfaces by an NF
3
and NH
3
plasma downstream treatment (J. Appl. Phys. Vol. 74, No. 2, Jul. 15, 1993). Similarly, Iusuki et al. report the native oxide removal by dry processing using NF
3
and H
2
plasma downstream treatment (Jap. J. Appl. Phys. Vol. 33, No. 4B, April 1994).
Accordingly, there is a need for an improved dry plasma etching technique which provides a substantially uniform etch in a contact opening without an increase in the critical dimension and without striations formed in the sidewalls of such contact opening. There is also a need for a dry plasma etching process for removal of native oxides from openings with less damage to the sidewalls of the opening. There is further a need for an improved dry plasma etching method for etching undoped oxide, such as thermally grown SiO
2
, faster than doped oxide, such as BPSG.
SUMMARY OF THE INVENTION
The present invention provides a dry plasma cleaning process for the removal of native oxides, or other oxide films or growth residue, formed on a semiconductor substrate, without damaging the substrate or affecting the critical dimension of a pattern on such substrate and with less damage to a downstream processing chamber. The invention is particularly useful for the selective etching of silicon dioxide residue at the bottom of a contact opening which is formed in a BPSG doped insulating layer. The invention is also useful for the etching of undoped oxides, such as thermally grown SiO
2
, at a faster rate than that for doped oxides, such as BPSG.
The present invention uses a gaseous mixture of nitrogen trifluoride (NF
3
) and ammonia (NH
3
), which is first injected upstream into a microwave plasma source which excites them, and then both gases flow downstream in plasma form onto a substrate surface. The method of the present invention provides a dry cleaning process for damageless removal of native oxides and/or growth residue from the bottom of a contact opening, without significantly affecting the critical dimension of such contact opening and with less damage to a downstream processing chamber. The invention also provides a dry plasma technique for etching undoped oxides faster than doped oxides.


REFERENCES:
patent: 5030319 (1991-07-01), Nishino et al.
patent: 5783495 (1998-07-01), Li et al.
Jun Kikuchi, et al.—“Native Oxide Removal on Si Surfaces by NF3—Added Hydrogen and Water Vapor Plasma Downstream Treatment” Jpn. J. Appl. Phys. vol. 33, Part 1, No. 4B, Apr. 1994, pp. 2207-2211.
H. Nishino, et al.—“Damage-free selective etching of Si native oxides using NH3/NF3and SF6H2O down-flow etching” Jpn. J. Appl. Phys. vol. 74, No. 2, Jul. 1993, pp. 1345-1348.

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