Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction
Reexamination Certificate
2000-03-01
2002-09-03
Ho, Hoai V. (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Heterojunction
C257S099000, C438S022000
Reexamination Certificate
active
06444998
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention concerns a semiconductor light emitting device suitable to application, for example, to a multi-beam semiconductor laser device or a multi-beam semiconductor diode device, as well as a manufacturing method thereof.
2. Description of Related Art
A semiconductor light emitting device such as a semiconductor laser or a semiconductor light emitting diode has been used, for example, as an optical device for conducting recording and/or reproduction to an optical recording medium such as an optical disc, or as a light source for a laser beam printer or the like. In recent years, a demand for a multi-beam arrangement has been increased more and more for driving a plurality of light emitting sections independently of each other, for enabling recording and/or reproduction or printing at a higher speed by using such semiconductor light emitting devices.
On the other hand, for attaining cost reduction and attaining increased speed, it is necessary to reduce the size of an optical system to the multi-beam semiconductor light emitting device and, correspondingly, a demand has been increased for higher degree of integration so as to narrow the beam pitch as much as possible.
In a semiconductor light emitting device, for example, a semiconductor multi-beam laser for enabling independent driving and intended for higher integration degree, as shown in a schematic perspective view of
FIG. 9
, a plurality of semiconductor light emitting sections, namely, four semiconductor laser devices M
1
to M
4
in the illustrated example are arranged side by side such that they can be driven indenpendently to a semiconductor substrate
21
at least comprising a first clad layer
2
, an active layer
3
, and a second clad layer
4
on a semiconductor substrate body
1
.
A method of manufacturing the semiconductor light emitting device is to be explained with reference to schematic cross sectional views for each of steps in
FIG. 10
to
FIG. 13 and a
schematic plan view for a portion of steps shown in FIG.
15
and FIG.
16
.
At first, as shown in
FIG. 10A
, on a semiconductor substrate
1
, for example, made of an n-type GaAs, there are epitaxially grown a first clad layer
2
made of an n-type AlGaAs, an active layer
3
made, for example, of an intrinsic AlGaAs and having a smaller band gap compared with the clad layer
2
and a second clad layer
4
made of p-type AlGaAs successively.
As shown in FIG.
10
C and
FIG. 14
, and with hatched lines in
FIG. 14
, current block layers
5
are formed being arranged in parallel in a stripe pattern to the second clad layer
4
.
The current block layers
5
are formed on the area between portions for forming the semiconductor light emitting sections M
1
to M
5
described above and the area corresponding to the outer side of both of outer M
1
and M
4
by etching grooves
6
in a stripe pattern respectively as shown in FIG.
10
B.
Subsequently, an n-type GaAs semiconductor layer of a conduction type different from the second clad layer
4
is epitaxially grown entirely so as to bury the inside of the grooves
6
although not illustrated and etched entirely from the surface thereof to form current block layers
5
formed by leaving the n-type GaAs semiconductor layer only in the grooves as shown in FIG.
10
C and FIG.
14
.
As shown in
FIG. 12A
, a cap layer
7
made of a p-type GaAs of a conduction type identical with that of the second clad layer is epitaxially grown entirely covering the current block layers
5
to constitute a semiconductor substrate
21
.
As shown in
FIG. 11B
, electrodes isolated from each other, four electrodes in the illustrated example, first to fourth electrodes A
1
to A
4
are deposited in ohmic contact as anode electrodes in this example on the cap layer
7
between each of adjacent current block layers
5
. In this case, the electrodes A
1
and A
4
on both sides, a portion thereof is extended to the outside in an L-shaped pattern.
As shown in FIG.
11
C and
FIG. 15
, an isolation groove
8
is formed between each of the electrodes A
1
to A
4
(indicated by hatched lines in
FIG. 15
) from the cap layer
7
to a thickness at least traversing the active layer
3
.
As shown in
FIG. 12A
, an interlayer insulation layer
9
is formed over the entire surface by a CVD (Chemical Vapor Deposition) method.
As shown in
FIG. 12B
, first to fourth openings
9
W
1
to
9
W
4
are perforated on the electrodes A
1
to A
4
, respectively, to the interlayer insulation layer
9
(only the first and fourth openings
9
W
1
and
9
W
4
are disclosed in the cross section of FIG.
12
B).
As shown in
FIG. 12C
, a flattening insulation material
10
is coated over the entire surface so as to bury the inside of each of the isolation grooves
8
.
Subsequently, as shown in FIG.
13
and
FIG. 16
, the first to fourth openings
9
W
1
-
9
W
2
are opened again to the flattening insulation material
10
from the surface thereof and are etched back in a plane manner to the position that the first to fourth electrodes A
1
to A
2
are exposed to the outside through the openings
9
W
1
-
9
W
4
.
Then, as shown in
FIG. 9
, conductor layers L
2
and L
3
in ohmic contact with the second and third electrodes A
2
and A
3
respectively through the second and the third openings
9
W
2
and
9
W
3
are extended and formed overriding the interlayer insulation layers
9
, bonding pads PD
2
and PD
3
are constituted at second and third extended ends of the conductor layers L
2
and L
3
, and first and fourth bonding pads PD
1
and PD
4
are constituted with the electrodes A
1
and A
4
exposed through the first and fourth openings
9
W
1
and
9
W
4
.
Although not illustrated, external leads, for example, Au wires are bonded to the bonding pads PD
1
to PD
4
respectively.
Further, a common counter electrode K, namely, a cathode electrode in the example described above is deposited, for example, in an ohmic contact entirely on the rear face of the semiconductor substrate body
1
.
In this constitution, when driving voltage is applied between each of the anode electrodes A
1
to A
4
and the common cathode electrode K independently, current is supplied restrictively in the stripe portions between the electrodes A
1
to A
4
and the electrode K sandwiched by the current block layers
5
and current is injected restrictively in the active layer
3
below the stripe.
Opposing end faces
21
m
1
and
21
m
2
of the semiconductor substrate
21
constituting both ends of the stripe are formed into a mirror face being constituted, for example, cleavage surface and stripe-like light resonators are constituted in the current injection region between the end faces
21
m
1
and
21
m
2
respectively and laser beams are emitted from both end faces. That is, first to fourth semiconductor light emitting sections M
1
to M
4
are constituted in respective portions of the stripes.
Since the laser devices, that is, the semiconductor light emitting sections M
1
to M
4
are isolated from each other by the isolation grooves
8
and the anode electrodes A
1
to A
4
are constituted electrically independent of each other, they can be driven independently.
However, as the integration degree is increased in the semiconductor multi-beam laser with the constitution described above, since the distance between each of the laser devices, namely, each of the semiconductor light emitting sections M
1
to M
4
is narrowed, electric cross-talk occurs, actually, between the laser devices, for example, in a case where one of light emitting sections of adjacent laser devices is driven to oscillate continuously, while the other is put to intermittent driving, such that large spike noises occur at the output on the side of the laser device driven to oscillate continuously.
In the structure, for example, described above, cross-talk is caused greatly by parasitic capacitance formed between portions where the first electrode A
1
and the fourth electrode A
4
, and the conductor layers L
2
and L
3
are laminated by way of the int
Narui Hironobu
Taniguchi Takehiro
Dang Phuc T.
Ho Hoai V.
Sonnenschein Nath & Rosenthal
Sony Corporation
LandOfFree
Semiconductor light emitting device and manufacturing method... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor light emitting device and manufacturing method..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor light emitting device and manufacturing method... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2907918