Carriers with concentric balloons supporting a diaphragm

Abrading – Precision device or process - or with condition responsive... – Computer controlled

Reexamination Certificate

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Details

C451S287000, C451S398000, C451S041000

Reexamination Certificate

active

06447368

ABSTRACT:

TECHNICAL FIELD
The present invention relates generally to semiconductor manufacturing, and more specifically to a carrier for retaining and pressing a semiconductor wafer against a polishing pad in a chemical-mechanical polishing tool to remove material and planarize the front surface of the wafer.
BACKGROUND OF THE INVENTION
A flat disk or “wafer” of single crystal silicon is the basic substrate material in the semiconductor industry for the manufacture of integrated circuits. Semiconductor wafers are typically created by growing an elongated cylinder or boule of single crystal silicon and then slicing individual wafers from the cylinder. The slicing causes both faces of the wafer to be extremely rough. The front face of the wafer on which integrated circuitry is to be constructed must be extremely flat in order to facilitate reliable semiconductor junctions with subsequent layers of material applied to the wafer. Also, the material layers (deposited thin film layers usually made of metals for conductors or oxides for insulators) applied to the wafer while building interconnects for the integrated circuitry must also be made a uniform thickness.
Planarization is the process of removing projections and other imperfections to create a flat planar surface, both locally and globally, and/or the removal of material to create a uniform thickness for a deposited thin film layer on a wafer. Semiconductor wafers are planarized or polished to achieve a smooth, flat finish before performing process steps that create integrated circuitry or interconnects on the wafer. A considerable amount of effort in the manufacturing of modern complex, high density multilevel interconnects is devoted to the planarization of the individual layers of the interconnect structure. Non-planar surfaces create poor optical resolution of subsequent photolithography processing steps. Poor optical resolution prohibits the printing of high-density lines. Another problem with non-planar surface topography is the step coverage of subsequent metalization layers. If a step height is too large there is a serious danger that open circuits will be created. Planar interconnect surface layers are required in the fabrication of modem high-density integrated circuits. To this end, CMP tools have been developed to provide controlled planarization of both structured and unstructured wafers.
Carriers may generally be grouped into back-reference and front-reference carriers. Back-reference carriers typically have a rigid pressure plate for supporting the back surface of the wafer while the wafer is pressed against the polishing pad. Imperfections on the back surface of the wafer are pressed on by the rigid pressure plate creating areas of non-uniform pressure on the front surface of the wafer. A compliant thin film may be used to cover the rigid pressure plate reducing, but not eliminating, the non-uniform pressure areas.
Front-reference carriers typically have a diaphragm for supporting the back surface of the wafer. Imperfections on the back surface of the wafer are better absorbed by the diaphragm than with the thin film allowing for a more uniform pressure to be placed on the front surface of the wafer. However, even with a uniform pressure on the front surface of the wafer, other problems, such as non-uniform slurry distribution or different motions for different points on the front surface of the wafer cause non-uniform planarization results. The non-uniform planarization results are typically manifested as concentric bands on the front surface of the wafer that need an increased or decreased material removal rate. It may therefore be desirable to have different pressures on different concentric bands while maintaining a uniform pressure over each band.
Carriers providing different uniform pressures on different concentric bands generally accomplish this by having two or more plenums that may be individually pressurized over a diaphragm separated by barriers. However, these carriers generally have a discontinuity of pressure at the interface between the bands near the barrier. This is generally caused by the barrier experiencing a shear force due to the different pressures within the plenums. The shear force causes the barrier to change position, for example by slightly lifting and puckering the diaphragm, creating a narrow band of discontinuity of pressure on the diaphragm along the barrier.
What is needed is a carrier having a plurality of concentric plenums that may be individually pressurized for planarizing the front surface of a wafer that reduces the discontinuities at the barrier between the plenums.
SUMMARY OF THE INVENTION
The invention is a method and apparatus that may be used in a CMP tool to press the front surface of a wafer against a polishing pad during a planarization process. A puck and a diaphragm may be used, possibly in combination with other features such as a cushion ring, to form a plenum within which concentric balloon may be positioned. Individually controllable fluid communication paths may be used to communicate a pressure to the plenum and/or concentric balloons. The plurality of concentric balloons may be used to apply different pressing forces through the diaphragm to the back surface of a wafer. Each pressing force is preferably uniform within a concentric band. Pressing force discontinuities between concentric bands are minimized by using thin balloons that are not connected to the thicker diaphragm.
As an improvement to the invention, the puck may have a plurality of concentric grooves. Double-sided tape may be placed inside each groove and the balloons may be sealed, for example by bonding, to metal rings. The metal rings may be inserted into the grooves and connected to the puck by the double-sided tape. The balloons may then be in position to expand within the plenum and support the diaphragm. The balloons are preferably very thin, highly elastic and sufficiently inflated during a planarization process to substantially fill the plenum to prevent pressure discontinuities at the interface between balloons. The diaphragm is preferably thicker and preferably less elastic than the balloons to average and further reduces any small discontinuities in pressure that may still exist on the diaphragm.
As another improvement, a cushion ring may be positioned between the periphery of the bottom surface of the puck and the periphery of the top surface of the diaphragm. In this embodiment, the cushion ring forms part of the plenum and provides space between the puck and diaphragm. The space is preferably substantially completely filled by the balloons when the balloons are expanded during a planarization process. A retaining ring may be connected to the periphery of the bottom surface of the diaphragm below the cushion ring. The cushion ring is preferably elastic, thereby allowing the retaining ring some freedom of movement in relation to the puck.
The above-described apparatus is preferably used for pressing against a back surface of a wafer during a planarization process. An exemplary method starts by pressurizing the plenum behind the diaphragm to provide a substantially uniform pressing force against a back surface of a test wafer. The test wafer is planarized and then its front surface uniformity is measured. The test wafer is used to assist in determining the optimum pressure to apply to each balloon. Multiple iterations of planarizing, measuring and adjusting the balloons may be done to optimize the planarization process until the planarization process reaches a level suitable for production wafers. Even after production wafers are used in the planarization process, further iterations of measuring the wafer's front surface and adjusting the pressure within the balloons, and therefore the pressure against the diaphragm, may be performed to further improve the planarization process.


REFERENCES:
patent: 5205082 (1993-04-01), Shendon et al.
patent: 5230184 (1993-07-01), Bukhman
patent: 5584746 (1996-12-01), Tanaka et al.
patent: 5584751 (1996-12-01), Kobayashi et al.
patent: 5605488 (199

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