Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate
1999-04-19
2002-07-02
Ngo, Ricky (Department: 2664)
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
C370S487000, C375S240010
Reexamination Certificate
active
06414954
ABSTRACT:
BACKGROUND OF THE INVENTION
(a) Field of the Invention
The present invention relates to picture processing system and method and, more particularly, to a technique for processing picture signals, which is capable of extracting desired video data and/or audio data from input transport stream.
(b) Description of the Related Art
A picture processing system is generally used in a television set, which receives video packets and/or audio packets from a specified one of a plurality of transmission channels.
FIG. 1
shows a conventional picture processing system in a block diagram. The picture processing system includes a data separator
40
, a host computer (CPU) and a MPEG audio/video (AV) decoder
42
. The data separator
40
includes a register block
43
including a video PID register
45
and an audio PID register
46
, and a TS header processor
47
. The term “PID” is the abbreviation of “packet identification data”, which includes 13 bits in payload of packets transmitted as a transport stream. In the decode-processing of the transport stream by the picture processing system, the payload data is judged by examining the value in the PID as to the type and the channel of the payload, namely whether the payload data is a video data or an audio data and to which channel the payload data belongs.
The host CPU
41
specifies a series of payload data to be processed by the TS header processor
47
by storing a PID value in each of the video PID register
45
and the audio PID register
46
. The MPEG AV decoder
42
receives video/audio data in the MPEG format supplied from the TS header processor
47
to decode the video/audio data for each of the picture frames.
Each of the video PID register
45
and the audio PID register
46
stores a value for the PID of the TS packet to be extracted from the input transport stream TS based on the signal supplied from the host CPU
41
. The TS header processor
47
selects and extracts a TS packet each having the specified PID value set in the video PID register
15
or the audio PID register
46
, then separates the payload data from the TS packet and delivers the separated payload data to the MPEG AV decoder
42
.
The TS header processor
47
outputs a splicing point signal when the TS header processor
47
detects a splicing point which is disposed between adjacent groups of packets in the transport stream for indicating a switch of picture frame, for example.
The splicing point signal is supplied to the host CPU
41
to generate an interruption for the operation of the CPU
41
. The host CPU
41
changes the settings in the video PID register
45
and the audio PID register
46
upon the interruption. By these procedures, the PID value for identifying the TS packet to be extracted by the TS header processor
47
is switched to a next PID. In a practical case, the change of the PID in the transport stream occurs when the broadcasting station switches its data between a drama picture and an advertising picture, for example. The value for PID of the payload data to be processed is specified in menu information or a program list in the input transport stream before each group of payload data to be processed reaches the TS header processor
47
.
In the conventional picture processing system as described above, the host CPU
41
changes the settings in the video PID register
45
and the audio PID register
46
immediately after the host CPU
41
receives the interruption. More specifically, the host CPU
41
must immediately respond to the interruption having a high priority when the host CPU
41
is informed of the PID switching. This processing is a heavy burden to the host CPU
41
. In addition, if a time lag occurs between the generation of the splicing point signal and processing by the host CPU
41
for the interruption, which sometimes occurs in a practical case, the entire screen exhibits white at a moment because no payload data is decoded.
SUMMARY OF THE INVENTION
It is therefore and object of the present invention to provide a picture processing system and a method therefor capable of reducing the burden of the host CPU upon the PID switching and operating the host CPU to switch the PID in real time, thereby avoiding the occurrence of no picture signal processing.
The present invention provides a picture processing system for processing a transport stream including a plurality of groups of packets and a splicing point for separating each two of the groups, each of the groups having payload data in the respective packets and a packet identification data (PID) for each of the groups, the picture processing system comprising a PID data storage section for storing a series of PID values corresponding to groups of packets to be processed, a next PID register for storing a next PID value corresponding to a next group of the packets, a present PID register for storing a present PID value corresponding to a present group of the packets to be processed, and a header processor for receiving the transport stream to output the payload data of packets each having a PID value which coincides with the present PID value, the header processor detecting the splicing point to output a PID switching signal, the next PID register responding to the PID switching signal to replace the next PID value with a following PID value following to the next PID value stored in the PID data storage section, the present PID register responding to the PID switching signal to replace the present PID value with the next PID value stored in the next PID register.
The present invention also provides a method for processing a transport stream including a plurality of groups of packets and a splicing point for separating each two of the groups, each of the groups having payload data in the respective packets and a packet identification data (PID) for each of the groups, the method comprising the steps of storing a series of PID values corresponding to groups of packets to be processed, storing a next PID value corresponding to a next group of the packets and a present PID value corresponding to a present group of the packets to be processed, detecting the splicing point to output a PID switching signal, replacing the present PID value with the next PID value, and receiving the transport stream to output the payload data of packets each having a PID value which coincides with the present PID value.
In accordance with the picture processing system and the method of the present invention, the switching of the PID value can be performed in real time by setting beforehand the next PID value to be stored next in the present PID register.
The above and other objects, features and advantages of the present invention will be more apparent from the following description, referring to the accompanying drawings.
REFERENCES:
patent: 5917830 (1999-06-01), Chen et al.
patent: 6088357 (2000-07-01), Anderson et al.
patent: 6115422 (2000-09-01), Anderson et al.
patent: 6229801 (2001-05-01), Anderson et al.
patent: 293837/1998 (1987-12-01), None
patent: 275147/1996 (1996-10-01), None
patent: 307865/1997 (1997-11-01), None
Eizo Joho Media Gakkai Gijutsu Hokoku, 1998 vol. 22, No. 8, pp. 33-40.
Ngo Ricky
Scully Scott Murphy & Presser
Tran Phuc
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