Monolithic integrated circuit

Metal working – Method of mechanical manufacture – Assembling or joining

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Details

29576B, 29577C, 148187, H01L 21265

Patent

active

045504903

ABSTRACT:
A method of producing an integrated insulated-gate field-effect transistor with an increased breakdown voltage provides in that at least one of the two zones, i.e. the source zone and/or the drain zone is surrounded by a relatively high-ohmic partial zone. This partial zone or the partial zones are first produced by way of ion implantation with the aid of a first implantation mask. After removal of this mask, the entire area of the field-effect transistor is covered with an oxidation masking layer comprising several selectively etchable partial layers, of which the lower partial layer is finally exposed and serves as the gate insulating layer. With the aid of the photoresist mask serving as an etching mask, openings are etched through the oxidation masking layer. The photoresist mask, together with the portions of the oxidation masking layer remaining therebelow, is used as an ion implantation mask for manufacturing both the source zone and the drain zone.

REFERENCES:
patent: 3745425 (1973-07-01), Beale et al.
patent: 4346512 (1982-08-01), Liang et al.
patent: 4382826 (1983-05-01), Pfieiderer et al.
patent: 4475279 (1984-10-01), Gahle
patent: 4477965 (1984-10-01), Blossfeld
patent: 4483738 (1984-11-01), Blossfeld

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