Semiconductor package with universal substrate for...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

Reexamination Certificate

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Details

C257S701000, C257S778000, C257S780000, C257S784000

Reexamination Certificate

active

06407450

ABSTRACT:

BRIEF DESCRIPTION OF THE INVENTION
This invention relates generally to the packaging of semiconductor chips. More particularly, this invention relates to a technique for packaging different sized semiconductor chips on a common substrate.
BACKGROUND OF THE INVENTION
After a semiconductor is designed, a separate package is typically designed to house the semiconductor. The reliance upon a separate package for every semiconductor design leads to expensive and time-consuming package design efforts. Accordingly, it would be highly desirable to reduce package design expenses.
SUMMARY OF THE INVENTION
A semiconductor package includes a universal substrate with interior pads, peripheral pads, and substrate traces positioned between the interior pads and the peripheral pads. The interior pads are configured for electrical interface with a first semiconductor chip. The peripheral pads are configured for electrical interface with a second semiconductor chip that is larger than the first semiconductor chip.
The invention reduces package design expenses by providing a universal package substrate that can receive semiconductor chips of different sizes. Thus, a single package can be used for a variety of devices. Preferably, the substrate connections (e.g., power pins, data pins, control pins, and the like) are universally the same, regardless of the semiconductor that is positioned within the package. The invention reduces time to market by reducing substrate design times, reducing non-recurring expenses, and reducing inventory costs.


REFERENCES:
patent: 4195195 (1980-03-01), de Miranda et al.
patent: 5378981 (1995-01-01), Higgins, III
patent: 5399903 (1995-03-01), Rostoker et al.
patent: 5637920 (1997-06-01), Loo
patent: 5696031 (1997-12-01), Wark
patent: 6008538 (1999-12-01), Akram et al.
patent: 6048753 (2000-04-01), Farnworth et al.
patent: 0 171 232 (1986-02-01), None
patent: 2 115 607 (1983-09-01), None

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