Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing
Reexamination Certificate
2000-07-21
2002-06-04
Le, Dinh T. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Synchronizing
C327S198000
Reexamination Certificate
active
06400196
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field of the Invention
The present invention relates to a semiconductor integrated circuit, a liquid crystal apparatus, an electronic apparatus and a method for testing a semiconductor integrated circuit.
2. Technical Background and Problems to be Solved by the Invention
One of semiconductor integrated circuits of the type described above initializes an output of a latch circuit based on a power-on reset signal, for example. Voltage and frequency can be set based on an output of the latch circuit such that the semiconductor integrated circuit can properly operates. Semiconductor integrated circuits may have different performances because their device elements may differ from one another. In order to solve this problem, outputs of latch circuits are adjusted, for example, by cutting fuse elements to provide appropriate driving conditions for individual semiconductor integrated circuits before the semiconductor integrated circuits are shipped out from the factory.
Typically, a semiconductor wafer is set in a probe apparatus before the semiconductor wafer is cut into individual semiconductor integrated circuits and the adjustment described above is conducted. More specifically, probes are brought in contact with all of the pad terminals on the semiconductor wafer in the probe apparatus and an electrical measurement is conducted for each of the chips by a tester.
However, when the adjustment is conducted on the wafer, latch circuits in the semiconductor integrated circuits cannot be normally operated, and there are occasions where reference voltages and reference frequencies that are generated within the semiconductor integrated circuits cannot be adjusted to be within appropriate ranges.
The inventors of the present invention diligently searched for the reasons of such occurrences, and discovered that they result from differences in driving conditions of semiconductor integrated circuits between the time when the adjustment is conducted on the wafer and the time when the individual semiconductor integrated circuits are used.
Therefore, it is an object of the present invention to provide a semiconductor integrated circuit, a liquid crystal apparatus, an electronic apparatus and a method for adjusting semiconductor integrated circuits, in which a latch circuit can be properly operated even when driving conditions are different between the time when the adjustment is conducted on the wafer and the time when the semiconductor integrated circuit is used after shipment.
SUMMARY OF THE INVENTION
An semiconductor integrated circuit in accordance with one embodiment of the present invention comprises a reset signal generation circuit that generates a reset signal having a reset period based on an input signal that is inputted at least immediately after power is turned on, at least one latch circuit having an initialization circuit that initializes a latch output based on the reset signal, a first pad terminal that is connected to the reset signal generation circuit, and at least one second pad terminal that is connected to an output line of the initialization circuit. The reset signal generation circuit has a delay circuit that variably sets a pulse width corresponding to the reset period of the reset signal. The delay circuit variably changes the pulse width according to a load that is connected to the first pad terminal.
In accordance with the embodiment of the present invention, during a normal use period when a semiconductor integrated circuit is mounted in an electronic apparatus, the first and second pad terminals are not used and, therefore, no load is connected to these pad terminals. Accordingly, the initialization circuit takes a shorter time for its initialization operation, and a reset period that is set by the delay circuit is relatively short. When a semiconductor integrated circuit is verified, the first and second pad terminals are connected to a tester through the probes and cables, and therefore a load connected these pad terminals increases. Accordingly, the initialization circuit takes a longer time for its initialization operation, but a reset period that is accordingly set by the delay circuit becomes to be relatively longer. In either of the cases, the initialization operation can be conducted within the reset period, and an area for the delay circuit does not have to be increased.
The first pad terminal may be connected to an output line of the delay circuit. Alternatively, the first pad terminal may be connected to an input line of the delay circuit. This is because the delay circuit can change the pulse width depending on a load that is connected to the first pad electrode.
A fuse element may be connected to an output line of the initialization circuit, and a logic of the latch output may be determined based on an open state or a closed state of the fuse element.
A relationship of C1·R1>C2·R2 may preferably be established, when the reset signal generation circuit is formed from a plurality of circuit elements, where R1 is an output impedance of one of the circuit elements in a preceding stage of a position where the first pad terminal is connected, C1 is a load capacitance that is connected to the first pad terminal, R2 is an output impedance of the initialization circuit, and C2 is a load capacitance that is connected to the second pad terminal.
As a result, the reset period is securely set to be longer than the operation time that is required by the initialization circuit for its initialization.
The reset signal generation circuit may include a one-shot pulse generation circuit that generates a one-shot reset signal having a pulse width corresponding to the reset period based on an input signal and a delay signal that is formed by delaying the input signal by the delay circuit.
Instead of the above, the reset signal generation circuit may include a one-shot pulse generation circuit that generates a one-shot pulse based on an input signal, and a pulse width variable circuit that includes a delay circuit and changes the pulse width of the one-shot pulse according to a load that is connected to the first pad terminal.
The input signal may preferably be inputted in the reset signal generation circuit a plurality of times during a period from a time immediately after the power supply is turned on to a time when the power supply is turned off. There may be a case where an initialized latch data may change due to noises or the like. In such a case, a latch output can be re-initialized based on an input signal that is inputted after the latch data is changed.
In this connection, a logic sum circuit (OR) circuit may preferably be provided to take a logic sum of a power-on reset signal and another signal. An output signal of the OR circuit may be inputted in the reset signal generation circuit. As a result, deteriorating effects of the noises can be eliminated.
The semiconductor integrated circuit may be provided with a reference voltage generation circuit that generates a reference voltage based on a latch output that is securely initialized in the manner described above. Furthermore, the semiconductor integrated circuit may be provided with a liquid crystal driving voltage generation circuit that generates a liquid crystal driving voltage in a plurality of levels based on an output voltage from the reference voltage generation circuit. The liquid crystal driving voltage directly affects the image quality, and thus requires a high level of accuracy. A highly accurate liquid crystal driving voltage can be generated by the present invention.
In addition, the semiconductor integrated circuit may be provided with a reference frequency generation circuit that generates a reference frequency based on a latch output that is securely initialized in the manner described above. Furthermore, an output frequency of the reference frequency generation circuit may be used as an alternating signal that alternately drives the liquid crystal. The frequency of the alternating signal for the liquid crystal affects flickering of the display scree
Aoki Shigeki
Kamijo Haruo
Le Dinh T.
Seiko Epson Corporation
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