Printed circuit board (PCB)

Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement

Reexamination Certificate

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Details

C174S256000, C174S266000, C029S852000, C361S767000

Reexamination Certificate

active

06414246

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to printed circuit boards (PCBs) and, more particularly, to a PCB having slots formed at a center pad thereof to prevent formation of voids and residues at solder joint areas and to improve RF grounding characteristics of the PCB.
BACKGROUND OF THE INVENTION
Conventional chip packages such as leadframe-based Chip Scale Packages (CSPs) are soldered onto PCBs using solder paste. Leadframe-based CSPs are CSPs having no peripheral leads that typically extend out from chip packages. A conventional leadframe-based CSP includes a leadframe divided into a die attach. pad centrally located therein and a plurality of wire bonding pads peripherally located therein. The conventional leadframe-based CSP further includes one or more dies or chips mounted on the die attach pad, bonding wires for electrically connecting the dies to the wire bonding pads, and a mold compound for encapsulating all these components in a package structure. A variety of different types of leadframe-based CSPs are available in the market, such as Micro-Lead Packages (MLPs), Micro-Lead-Frames (MLFs), Leadless Package Chip Carriers (LPCC), etc. Joint Electron Device Engineering Counsel (JEDEC), which is a committee for establishing industry standards and packaging outlines, has defined a package outline named “MO-220” for leadframe-based CSPS. This outline classifies the leadframe-based CSPs as HP-VFQFP-Ns or HP-WFQFP-Ns. More information about such packages is available at the website http:/www.jedec.org/home/about jedec.htm.
A conventional PCB is made of conductive layers and dielectric layers stacked up in an alternating manner. The top conductive layer on the PCB is divided into a center pad centrally located therein and a plurality of I/O (input/output) pins peripherally located therein. Typically, solder paste is deposited on certain portions of the center pad and the I/O pins. An electronic package such as a leadframe-based CSP is then placed onto the PCB and fixedly mounted thereon by solder paste. During the mounting of the leadframe-based CSP, the die attach pad of the leadframe-based CSP is aligned with the center pad of the PCB and the wire bonding pads of the leadframe-based CSP are aligned with the I/O pins of the PCB.
FIG. 1
is a plan view of a conventional PCB for mounting an electronic package such as a conventional leadframe-based CSP. As shown in
FIG. 1
, a conventional leadframe-based PCB
10
includes a center pad
12
centrally located therein and forming a ground plane, a plurality of I/O pins
14
peripherally located therein, and a plurality of metal plated through vias
16
for supplying an electrical ground path for the CSP. Solder paste is selectively applied to the surfaces of the center pad
12
and the I/O pins
14
for soldering the electronic package onto the PCB.
A significant problem arises, however, in such conventional PCBs during the mounting of the electronic package because voids, air bubbles, flux residues and contaminants are introduced at the solder joints, i.e., between the CSP and the surfaces of the PCB, and such contaminants can be entrapped at the solder joints. This problem is more significant in the center pad area than the I/O pin areas because the center pad area involves a larger area to be soldered. The entrapment of the contaminants deteriorates the performance of the PCB and the electronic package. Over a period of time, the entrapped contaminants can lead to a partial or full separation of the electronic package from the PCB, which is a serious problem that must be addressed.
Accordingly, there is a need for an improved PCB that overcomes the above-described solder problems of conventional PCBs.
SUMMARY OF THE INVENTION
The present invention provides an improved PCB that overcomes problems of conventional PCBs. Particularly, the PCB of the present invention provides one or more slots in a center pad of the PCB. These slots function as “escape” areas into which voids, air bubbles, flux residues, and other contaminants can move away from solder joints. Therefore, the solder joint areas are devoid of such contaminants and an electronic package can be soldered onto the PCB effectively.
Accordingly, the present invention is directed to a printed circuit board (PCB) for mounting an electronic package thereon, the PCB comprising a center pad formed on a substrate and located centrally therein, a plurality of input/output (I/O) pins formed on the substrate and peripherally located therein, and at least one slot formed in the center pad for providing escape areas into which contaminants can escape from solder joints associated with mounting of the electronic package on the PCB.
The present invention is further directed to an assembly comprising a printed circuit board (PCB) including a center pad located centrally in the PCB, a plurality of input/output (I/O) pins located peripherally in the PCB, and at least one slot formed in the center pad; and an electronic package mounted on the PCB, wherein the at least one slot provides escape areas into which contaminants can escape from solder joints associated with mounting the electronic package onto the PCB.
Moreover, the present invention is directed to a method of providing a printed circuit board (PCB) for mounting an electronic package thereon, the method comprising the steps of providing a center pad centrally located on a substrate; providing a plurality of input/output (I/O) pins peripherally located on the substrate; and providing at least one slot disposed in the center pad for providing escape areas into which contaminants can escape from solder joints associated with mounting of the electronic package onto the PCB.


REFERENCES:
patent: 5373629 (1994-12-01), Hupe et al.
patent: 6046911 (2000-04-01), Dranchak et al.
patent: 6070785 (2000-06-01), Ameen et al.
patent: 04026189 (1992-01-01), None

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