Serial line synchronization method and apparatus

Pulse or digital communications – Systems using alternating or pulsating current – Angle modulation

Reexamination Certificate

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Details

C375S333000, C375S361000

Reexamination Certificate

active

06449315

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates generally to data communication systems, and, more particularly, to methods and apparatus for synchronizing transmissions of serial data signals transmitted via such systems.
2. Description of the Existing Art
Currently, high speed serial line communications is experiencing increasing use across many application areas, not the least of which being telecommunications. Generally, serial line communication systems transmit digital data, whether digitized voice in a telephone system or data from a computer, as a serial bit stream over various transmission media, such as wire cables, radio waves, fiber optic cables and the like. Typically, to efficiently transfer large quantities of data, individual bit streams from multiple data sources are multiplexed to form a single, serial bit stream. After transmission along a single transmission medium, the multiplexed bit stream is demultiplexed to reproduce the individual bit streams.
To facilitate proper routing of the individual bit streams to their respective destinations, the multiplexed serial bit stream must be organized so that a demultiplexer can identify and separate the bits, within the multiplexed bit stream, that are associated with each individual bit stream. Proper routing is accomplished by organizing the multiplexed bit stream into sequential frames each containing a sequence of time-slots. In practice, at a transmitter end of a serial line communication system, a multiplexer inserts bits from each individual bit stream into a corresponding time-slot within each frame. The locations of the bits within a frame comprising any one individual bit stream are known by counting bit positions, or time-slots, relative to the beginning, or end, of each frame. For example, in a 30 time-slot frame carrying bits from three data sources, bits from the first, second and third sources may be separately carried in the first, second and third successive ten time-slots relative to the beginning of the frame. Thus, specific time-slots, illustratively ten such slots, in each frame correspond to each data source. In this manner, each individual bit stream can be extracted from the frames and reassembled into individual bit streams associated with each particular data source.
Consequently, through proliferation of such serial line communications systems utilizing frame formatted data, a need has existed in the art to accurately determine a beginning, or an end, of each frame. Typically, a specific sequence of bits known as a “framing sequence” marks the beginning (or end) of each frame. To maintain frame synchronization, a data receiver, which may be a component of a demultiplexer, monitors a received bit stream for the framing sequence. Subsequently, the data receiver produces a frame synchronization signal upon each occurrence of the framing sequence. For example, in a 30-channel pulse code modulation (PCM) system commonly used for telephone transmissions in Europe and Asia, a frame comprises 32 time-slots with each slot containing 8 bits of data. of these, 31 time-slots contain information bits from individual bit streams with the remaining time-slot, specifically the first in the frame, containing an 8-bit framing sequence. The eight bits in the framing sequence are typically:
X0011011, for even frames, and
X1AYYYYYY, for odd frames,
where the bits labeled X and Y are usually set to 1. The bit labeled A can be used as an alarm bit that is set to 1 whenever frame synchronization is lost.
Detrimentally, due to errors which typically arise from noise in the transmission medium, the information bits within a frame can be corrupted such that these bits identically resemble the framing is sequence. In this instance, the data receiver would erroneously synchronize to the information bits rather than the framing sequence thereby causing a frame synchronization error and a resulting loss of data. To avoid such errors, oftentimes a second signal, a frame synchronization signal, is transmitted via a separate and independent transmission medium to the data receiver. The frame synchronization signal, in combination with the framing sequence, indicates the beginning (or end) of the frame. This arrangement avoids any ambiguities that may arise between information bits and the framing sequence. However, due to the additional transmission medium and associated receiver circuitry, such a dual transmission arrangement is costly and complex.
Thus, a need currently exists in the art for a technique, specifically apparatus and an accompanying method, for providing accurate frame synchronization in a serial line communication system. Advantageously, this technique should be immune to frame synchronization errors caused by certain data sequences in a transmitted frame. Furthermore, this technique should carry both a frame synchronization signal and a data bit stream, i.e., the information and framing sequence bits over a single serial transmission medium.
SUMMARY OF THE INVENTION
Accordingly, an object of the present invention is to provide a technique that can receive frame synchronization signals and data over a single serial transmission medium.
A specific object is to provide such a technique that is substantially immune to frame synchronization errors caused by information bit sequences which are identical to the framing sequences.
These and other objects are advantageously achieved through an inventive serial line synchronization technique. Specifically, in accordance with the inventive teachings, a frame synchronization signal, a clock signal and a data signal are encoded to form a single bi-phase mark signal wherein the frame synchronization signal is incorporated into the bi-phase mark signal as a protocol violation in a modulation protocol defining the bi-phase mark signal. The bi-phase mark signal is then transmitted through a transmission medium. A receiver, connected to the transmission medium, receives and amplifies the bi-phase mark signal. Subsequently, the receiver decodes the amplified bi-phase mark signal and reproduces the clock, frame synchronization and data signals.
By advantageously incorporating a frame synchronization signal into the bi-phase mark signal, the inventive serial line synchronization technique does not require a second transmission medium and associated receiver circuitry to transmit a frame synchronization signal separate from the data signal.


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