Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For high frequency device
Reexamination Certificate
2000-08-09
2002-09-24
Loke, Steven (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
For high frequency device
C257S729000, C257S692000, C257S698000, C257S664000, C257S693000, C257S703000, C257S701000, C257S730000
Reexamination Certificate
active
06455932
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to a ceramic package for a semiconductor device, and especially to a ceramic package for a semiconductor device with a high output power used in a GHz band.
BACKGROUND OF THE INVENTION
Recently, a technology on a semiconductor device with high gain and high output power used in an extremely high frequency band, such as X or Ku band, makes remarkable progress.
FIG. 1
shows a structure of a conventional ceramic package for a semiconductor device used in a GHz band.
FIG. 2
is an enlarged diagram for showing Part A in FIG.
1
. The conventional ceramic package for the semiconductor device is fabricated by processing a Cu plate serving as a heat sink, and provided with fitting portions
1
a
,
1
b
situated on both side ends thereof, a rectangular bottom plate
1
c
for mounting a semiconductor chip, such as a MOSFET (not shown), and a side wall
1
d
surrounding the bottom plate
1
c
. The fitting portions
1
a
,
1
b
are provided with dents
1
e
,
1
f
, through which fixing screws pass when the ceramic package is fixed to a substrate. The side wall
1
d
surrounds an inner space with a size of a′×b′.
As shown in
FIG. 4
, leads
3
,
4
which are respectively connected with a gate and a drain of the FET by wire bonding pass through two sides of the side wall
1
d
, those being opposite to each other. A circular marking
2
for notifying that the lead
3
is connected with the gate is made on the fitting portion
1
a
. This marking is made as a dent formed by a press, a painted one by means of a paint-spraying alliance or a printed one by means of an ink jet printer.
As shown in
FIGS. 1 and 2
, the side wall
1
d
is provided with narrow width portions
5
which are respectively combined with dents
7
formed at backsides thereof. Ceramic pieces
6
a
,
6
b
are situated at a position where the lead
4
(or the lead
3
) passes through the narrow width portion
5
. A channel with a rectangular cross-section is formed at a bottom surface of the ceramic piece
6
b
. The lead
4
is fitted into the channel, supported by the ceramic pieces
6
a
,
6
b
, and fixed to and insulted from the side wall
1
d
by them. The ceramic pieces
6
a
,
6
b
are respectively formed by processing ceramic material into configurations shown in
FIGS. 1 and 2
. A length of the ceramic piece
6
a
is longer than a width of the side wall
1
d
, and an inner end of the same reaches the bottom plate
1
c
on the inside of the side wall
1
d
. On the other hand, a length of the ceramic piece
6
b
is the same as a width of the narrow width portion
5
.
In the ceramic package shown in
FIG. 1
, a power MOSFET is mounted on the bottom plate
1
c
. A gate pad and a drain pad are respectively connected with the leads
3
,
4
by means of wire bounding, and a source pad is connected with the bottom plate
1
c
serving as the ground to be fixed thereto. The space surrounded by the side wall
1
d
is charged with N
2
gas, and sealed with a cover (not shown) formed of Cu. In this way, the semiconductor device provided with the heat sink
1
for radiating heat is completed.
As mentioned in the above, since the conventional ceramic package for the semiconductor device reduces an area of a boundary surface for fixing ceramic to Cu by supporting the lead
4
(or the lead
3
) by means of the ceramic pieces
6
a
,
6
b
fitted into the narrow width portion
5
provided for the side wall
1
d
, the ceramic pieces
6
a
,
6
b
are prevented from being cracked at the boundary surface for fixing ceramic to Cu even when stress caused by a difference in a thermal expansion coefficient between ceramic and Cu is applied to the ceramic pieces
6
a
,
6
b
, and the power MOSFET is kept to be sealed.
However, according to the conventional ceramic package for the semiconductor device, since the surface of a wall of the inner space having the bottom plate
1
c
as the base is remoter from a chip-mounting region than an internal end face of the ceramic piece
6
a
, the spatial distance a′ of the inner space surrounded by the side wall
1
d
becomes long. As a result, a resonance frequency f of the inner space surrounded by the side wall
1
d
becomes low, wherein f is given as
f
={(1
/a′
)
2
+(1
/b′
)
2
}
½
×150.
If f becomes low, reflection losses in a higher frequency region (f=14.5 GHz) at input and output ports increase, and an isolation characteristic of the input port from the output port deteriorates.
The ceramic package with the structure shown in
FIG. 1
is used in the X to Ku band. Hitherto, the saturation output level of the semiconductor device is about 10W, a small number, and in such a case, deterioration of the isolation characteristic of the input port does not matter. However, the semiconductor device with high output power and high gain is successively developed in recent years, and the improvement of the isolation characteristic of the input port of the ceramic package becomes indispensable.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the invention to provide a ceramic package for a semiconductor device which prevents ceramic pieces from being cracked by thermal stress applied therto caused by difference in a thermal expansion coefficient between ceramic and Cu, and improves an isolation characteristic of an input port from an output port.
According to a feature of the invention, a ceramic package for a semiconductor device comprises:
a metallic bottom plate with predetermined dimensions,
a semiconductor chip mounted on a central region of the metallic bottom plate,
a metallic side wall squarely surrounding the semiconductor chip on the metallic bottom plate, and
ceramic insulators fitted into openings formed on the metallic side wall and supporting leads to be connected with the semiconductor chip,
wherein inner surfaces of the metallic side wall and those of the ceramic insulators respectively and approximately lie on same planes which are closet to the central region, and
the ceramic insulators are respectively provided with clearances for relaxing thermal stress applied to the ceramic insulators at boundary surfaces between the ceramic insulators and the metallic side wall without deteriorating an airtight property of the ceramic package.
According to the aforementioned structure, since the inner surface of the metallic side wall and that of the ceramic insulator lie on the same plane vertical to the metallic bottom plate, the inner space of the metallic side wall surrounding the semiconductor chip is reduced, hence an spatial distance thereof is shortened. Accordingly, an resonance frequency is heightened depending on the spatial distance, and thereby an isolation characteristic of an input port from an output port is improved. Moreover, since the clearance is provided for the boundary surface between the ceramic insulator and the metallic side wall, the ceramic insulator is prevented from being cracked without deteriorating an airtight property of the ceramic package.
REFERENCES:
patent: 4698661 (1987-10-01), Bessonneau et al.
patent: 4908694 (1990-03-01), Hidaka et al.
patent: 5574314 (1996-11-01), Okada et al.
patent: 5852391 (1998-12-01), Watanabe et al.
patent: 6043556 (2000-03-01), Tomie
patent: 60-210853 (1985-10-01), None
patent: 2-88242 (1990-07-01), None
patent: 10-112513 (1998-04-01), None
Hutchins, Wheeler & Dittmar
Loke Steven
Parekh Nitin
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