Method of forming a plurality of semiconductor devices

Semiconductor device manufacturing: process – Semiconductor substrate dicing – With attachment to temporary support or carrier

Reexamination Certificate

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Reexamination Certificate

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06383895

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device equipped with a heat sink and having a large amount of heat generation and a manufacturing method thereof, and more particularly, to a GaAs semiconductor device and a manufacturing method thereof.
2. Description of the Related Art
Semiconductor devices having a superior high frequency performance, for example, a Schottky gate field effect transistor (FET) using a III-V group semiconductor, such as GaAs, have been widely used in the fields of satellite communication, mobile communication, microwave base communication and the like. Accordingly, there has been a considerable demand for improvement of their performance.
For improvements of the high frequency performance and reliability, it is essential for those semiconductor devices to efficiently release heat generated due to an increase of the output power.
In particular, in the case of GaAs devices, suppression of the temperature increase of the element due to heat generation of the semiconductor element is an important key to realization of their full performance as well as a high reliability of the semiconductor device.
Also, because a temperature increase during the manufacturing process, such as mount process or the like, and during actual usage of the semiconductor device causes a stress to the GaAs element, a technique for alleviating such a temperature increase has been sought.
As such conventional technique, a heat sink having a thermal expansion coefficient substantially equal to that of the GaAs element is adhered to the GaAs element. However, there has been disclosed no methods, which realize this effect with mass production and at a low cost. Japanese Patent No. 2762987 discloses a technique for a semiconductor device in which, a heat sink made of a high thermal conductivity insulator having a thermal expansion coefficient which is substantially equal to that of the GaAs substrate is adhered to the back surface of the GaAs substrate. However, in this technique, after the high thermal conductivity insulator is adhered to the GaAs substrate, the GaAs substrate is cut together with the high thermal conductivity insulator to yield pieces of a pellet size. Accordingly, there is a drawback in which it requires a cumbersome cut-work, resulting in a low efficiency. Also, there is another drawback in which, because the high thermal conductivity insulator has a plate-like shape, its surface area is small, and a sufficient heat release performance cannot be achieved.
Further, Japanese Patent Laid-open Publication No. Hei6-349983 also discloses a technique in which a heat releasing plate (heat sink) is adhered to the back surface of the semiconductor wafer, and the semiconductor wafer is cut together with the heat releasing plate. However, this technique also has a drawback in which it requires a cumbersome cut-work, resulting in a low efficiency. Also, there is another drawback in which, because the high thermal conductivity insulator has a plate-like shape, its surface area is small, and a sufficient heat release performance cannot be achieved.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor device which is capable of preventing its performance degradation and generation of cracks in a semiconductor substrate, in particular, a GaAs substrate, which are caused by a stress accompanied by a temperature increase, and a manufacturing method thereof which is superior in mass productivity and low cost.
A manufacturing method of a semiconductor device according to the present invention comprises the steps of forming a plurality of semiconductor elements at a predetermined interval on a surface of a semiconductor substrate; working the semiconductor substrate to a predetermined thickness; preparing a plate member having a flat surface and a groove-shape surface, grooves being formed in the groove-shape surface at an interval which is substantially equal to the interval of the semiconductor elements; arranging the plate member and the semiconductor substrate so as to align positions between the semiconductor elements with the grooves; adhering the flat surface of the plate member to a surface of the semiconductor substrate on which the semiconductor elements are not formed; and breaking these adhered semiconductor substrate and the plate member along the grooves, thereby obtaining a plurality of semiconductor devices in which the plate member is adhered to the semiconductor substrate having the semiconductor element formed thereon.
In the present invention, the plate member, in which grooves are formed in advance at an interval which is substantially equal to the interval between the semiconductor elements, and the semiconductor substrate are arranged so as to align the positions between the semiconductor elements with the positions of the grooves, and they are adhered together using, for example, a bonding resin or an AuSn alloy. Then, by breaking the semiconductor substrate and the plate member together at the grooves, it becomes possible to manufacture the semiconductor devices equipped with a heat sink made of the plate member in mass production and at a low cost. The flatness of the flat surface of the plate member may be tolerated as long as the flatness does not cause problems upon adhering the plate member to the semiconductor substrate. Also, the positional relationship between the grooves and the semiconductor elements needs to be adjusted so as to prevent the cut-out faces of the semiconductor substrate from entering the interior of the semiconductor elements. Also, the interval of the grooves may be substantially equal to the interval of the semiconductor elements to the extent which enables the positional relationship between the grooves and the semiconductor elements to be maintained throughout the entire semiconductor substrate before breaking.
The semiconductor substrate is made of a III|-V group semiconductor, for example. In particular, it may be made of GaAs.
Also, it is preferable that the thermal expansion coefficient of the plate member is substantially equal to the thermal expansion coefficient of the semiconductor substrate. The plate member is formed of aluminum nitride, for example. By making the thermal expansion coefficient of the plate member substantially equal to the thermal expansion coefficient of the semiconductor substrate, generation of a stress due to a difference in thermal expansion coefficient can be suppressed, and deterioration of the performance of the semiconductor device and generation of cracks can be prevented. In particular, by using, as a heat sink, an aluminum nitride plate which has a thermal expansion coefficient of about 6 ppm/° C., which is consistent with the thermal expansion coefficient of the GaAs substrate, even when the semiconductor device is mounted on a base member which has a thermal expansion coefficient different from that of the GaAs substrate, the aluminum nitride plate functions as a cushioning material, thereby relaxing a stress the GaAs substrate receiving from the base member due to thermal expansion and thermal contraction.
A semiconductor device according to the present invention comprises a semiconductor element; a semiconductor substrate made of a III-V group material, the semiconductor element being formed on the semiconductor substrate; and a heat sink made of a plate member adhered to the semiconductor substrate, the thermal expansion coefficient of the plate member being substantially equal to the thermal expansion coefficient of the semiconductor substrate, wherein irregularity is formed in a surface of the plate member to which the semiconductor substrate is not adhered.
According to the present invention, a heat sink made of a plate member having a thermal expansion coefficient which is substantially equal to the thermal expansion coefficient of the semiconductor substrate is adhered to the III-V group semiconductor substrate. Accordingly, temperature elevation of the semiconductor device is suppressed,

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