Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices
Reexamination Certificate
2000-07-03
2002-03-19
Gandhi, Jayprakash N. (Department: 2841)
Electricity: electrical systems and devices
Housing or mounting assemblies with diverse electrical...
For electronic systems and devices
C361S743000, C361S767000, C174S263000
Reexamination Certificate
active
06359790
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The invention relates to a multichip module.
In the design of complex electronic systems with a plurality of semiconductor chips, problems appertaining to the connection and packaging technology are increasingly coming to the fore in the course of reducing the chip connection spacings. The conventional construction, in which the chips are housed individually, provided with connections and then mounted individually on a printed circuit board, is not optimal in many cases owing to the relatively high space requirement and owing to the wiring required between the individual chips.
It has therefore become increasingly more common to produce the system in the form of multichip modules, in which a substrate with high-density multilayer wiring, on which the chips are fitted, serves as an intermediate carrier substrate for joint integration of a plurality of chips in a next higher architectural level of the system design. Suitable materials for the intermediate carrier substrate nowadays include, in addition to conventional plastic, principally ceramic, metal and silicon. Silicon and ceramic are problematic, however, with regard to combination with the space-saving connection technology BGA (ball grid array), since the holes required for the through-plating from the multilayer wiring on the mounting side to the large-area solder agglomerations on the underside can be produced only with difficulty for a ceramic substrate for example.
International PCT patent publication WO 98/18303 has disclosed a multichip module with a special design and connection system based on silicon substrates. That document proposes dividing the intermediate carrier substrate on the one hand into small pallets with high-density wiring, on each of which preferably an individual chip is arranged using flip-chip technology, and on the other hand into a larger board with recesses for the chips of the individual pallets. The pallets with the chips are thus themselves soldered onto the contacts of the board once again using flip-chip technology. In order to obtain the most uniform thermal expansion possible, it is proposed to produce the pallets and the board from the same material as the chips, that is to say from silicon. However, the prior art design results in space not being used optimally, since the pallets are somewhat larger than the chips themselves, and is relatively costly in terms of production on account of the division or doubling of the substrate into pallet and board.
SUMMARY OF THE INVENTION
The object of the invention is to provide a multichip module which overcomes the above-noted deficiencies and disadvantages of the prior art devices and methods of this general kind.
With the above and other objects in view there is provided, in accordance with the invention, a multichip module, comprising:
a silicon carrier substrate having a mounting side and an underside;
multilayer wiring applied to the mounting side of the carrier substrate, the multilayer wiring including a first, uppermost conductor track plane and a lowermost conductor track plane;
at least one semiconductor chip in contact with the first, uppermost conductor track plane and flip-chip mounted thereon via a plurality of small solder balls; and
the underside of the carrier substrate having formed therein a plurality of cavities narrowing in a funnel shape from the underside and to the lowermost conductor track plane; and
a plurality of soldering contacts each in the form of a solder agglomeration disposed in a respective one of the cavities and extending from the underside to the lowermost conductor track
plane, for electrically connecting the multichip module to a mounting rack.
In accordance with an added feature of the invention, the solder agglomerations are areally arranged ball grid array solder agglomerations.
In accordance with an additional feature of the invention, the cavities having inclined sides each covered with an insulating layer composed of a poorly planarizing material, such as, for example, photoimide.
In accordance with a concomitant feature of the invention, there is also provided a multichip module assembly with two of the above-described multichip modules arranged one above the other in a sandwich type relationship. The solder agglomerations of the upper module are arranged only in outer region of the carrier substrate and are soldered directly on the multilayer wiring of the lower module.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a multichip module having a silicon carrier substrate, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.
REFERENCES:
patent: 4807021 (1989-02-01), Okumura
patent: 4868636 (1989-09-01), Gross
patent: 5222014 (1993-06-01), Lin
patent: 5367435 (1994-11-01), Andros et al.
patent: 5715144 (1998-02-01), Ameen et al.
patent: 6087597 (2000-07-01), Shimada et al.
patent: 198 30 158 (1999-04-01), None
International Publication WO 98/18303 (Brown et al.), dated Apr. 30, 1998.
Bui Hung
Infineon - Technologies AG
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