Forward body bias voltage generation systems

Details Forward body bias voltage generation systems Forward body bias voltage generation systems

1999-11-30

2002-04-02

Kim, Jung Ho (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

With specific source of supply or bias voltage

C327S537000

Reexamination Certificate

active

06366156

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Technical Field of the Invention
The present invention relates to circuits and, more particularly, to a voltage generation system to provide forward body bias (FBB) to transistors.
2. Background Art
Forward body biasing reduces process induced variations in short channel field effect transistors (FETs). N-channel FETs (NFETs) have sources, drains, and bodies with voltages Vsource, Vdrain, and Vbody. N-channel metal oxide semiconductor field effect transistors (NMOSFETs) are examples of NFETs. NFETs are zero body biased when Vbody=Vsource, reverse body biased when Vbody<Vsource, and forward body biased when Vbody>Vsource. The amount of FBB for NFETs is measured by Vbody−Vsource, which equals Vbody when Vsource is at ground (sometimes referred to as Vss). P-channel FETs (PFETs) have sources, drains, and bodies with voltages Vsource, Vdrain, and Vbody. P-channel metal oxide semiconductor field effect transistors (PMOSFETs) are examples of PFETs. PFETs are zero body biased when Vbody=Vsource, reverse body biased when Vbody>Vsource, and forward body biased when Vbody<Vsource. The amount of FBB for PFETs is measured by Vsource−Vbody, which equals Vcc−Vbody in cases where Vsource is at the power supply signal Vcc (sometimes referred to as Vdd).
The threshold voltage (Vt) of a FET decreases as the FET becomes more forward biased and increases as the FET becomes less forward biased or more reverse biased. The leakage of a FET increases as the FET becomes more forward biased and decreases as the FET becomes less forward biased or more reverse biased.
A well known technique for eliminating noise is to provide a signal is provided differentially on two conductors because noise tends to appear on both conductors equally. A receiver removes the difference between the signals, and noise appearing on both conductors is cancelled (rejected).
A variety of regulation circuits have been used to maintain a voltage and/or a current of a signal constant in the presence of changes in, for example, noise or load impedance.
SUMMARY
In some embodiments, the invention includes an electrical system having a functional unit block (FUB) including field effect transistors (FETs). A distributed forward body bias (FBB) voltage generation system provides at least one body bias signal to at least some of the FETs of the FUB such that the at least some of the FETs have a constant FBB.
In some embodiments, the system includes a constant differential voltage generator and a distributed body bias generator to receive a set of differential signals from the constant differential voltage generator and provide at least one body bias signal to at least some of the FETs of the FUB such that the at least some of the FETs have a constant forward body bias.
In some embodiments, the system includes multiple body bias generators coupled to corresponding FUBs receive a set of differential signals from a single constant differential voltage generator. In other embodiments, multiple constant differential voltage generators provide multiple sets of differential signals to multiple body bias generators coupled to corresponding FUBs.
In some embodiments, the system is included in a single integrated circuit. In other embodiments, the system is includes in multiple integrated circuits.
Additional embodiments are described and claimed.


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