Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2001-02-16
2002-09-17
Kunemund, Robert (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S710000, C438S712000, C438S720000
Reexamination Certificate
active
06451702
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to optical detectors, and more particularly, to lateral trench optical detectors formed on a semiconductor opto-electronic integrated circuit.
2. Description of Prior Art
According to prior art methods of forming trench based optical detectors, in order to form the detector, trenches for different types of electrodes needed to be etched separately, increasing the number of steps in the fabrication process. Because these steps are among the more expensive steps in the fabrication of optical detectors, the production costs reflect the added expense.
Therefore, a need exists for a method of forming a lateral trench p-i-n photo-diodes (LTD) wherein the trenches are patterned and then etched for all electrode types simultaneously.
SUMMARY OF THE INVENTION
According to an embodiment of the present invention, a method is provided for forming an optical detector device on a semiconductor substrate. The method includes forming a first set and a second set of trenches in the substrate, wherein trenches of the first set are alternately disposed with respect to trenches of the second set, filling the trenches with a sacrificial material, and etching the sacrificial material from the first set of trenches. The method further includes filling the first set of trenches with a doped material of a first conductivity, etching the sacrificial material from a second set of trenches, filling the second set of trenches with a doped material of a second conductivity, forming a first junction layer by driving dopants from the doped material in each of the first set of trenches and forming a second junction layer by driving dopants from the doped material in each of the second set of trenches, and providing separate wiring connections to the first set of trenches and the second set of trenches. The first set and the second set of trenches in the substrate are formed simultaneously.
Etching the sacrificial material from the first set of trenches further comprises the steps of removing sacrificial material from a surface of the device, and masking the second set of trenches. Etching the sacrificial material from a second set of trenches includes exposing the sacrificial material of the second set of trenches to a surface of the device.
Providing separate wiring connections includes exposing the doped material filling the first set of trenches and the doped material filling the second set of trenches to a surface of the device, and providing each of the first set of trenches with a first set of contacts and the second set of trenches with a second set of contacts.
Forming the junction layers further comprises the steps of depositing a diffusion barrier layer over a surface of the device prior to forming the junction layers, and removing the diffusion barrier layer from a surface of the device after forming the junction layers.
Exposing the sacrificial material of the second set of trenches further includes the step of removing the doped material of the first conductivity from a region above the second set of trenches by mechanical polish. Exposing the sacrificial material of the second set of trenches includes patterning the doped material of the first conductivity, and etching the doped material of the first conductivity in a region above the second set of trenches.
The material of the first conductivity comprises n-type doped polysilicon and the material of the second conductivity comprises p-type doped polysilicon. Alternatively, the material of the first conductivity comprises p-type doped polysilicon and the material of the second conductivity comprises n-type doped polysilicon.
The substrate includes a semiconductor material, a SiO
2
layer deposited over the semiconductor material, and a SiN layer deposited over the a SiO
2
layer.
According to an embodiment of the present invention, a method is provided for forming an optical detector device on a semiconductor substrate. The method includes forming a first set and a second set of trenches in the substrate, wherein trenches of the first set are alternately disposed with respect to trenches of the second set, filling the trenches with a sacrificial material of a first conductivity, and etching the sacrificial material from the first set of trenches. The method further includes filling the first set of trenches with a doped material of a second conductivity, forming a first junction layer by driving dopants from the doped material in each of the first set of trenches and forming a second junction layer by driving dopants from the sacrificial material in each of the second set of trenches, etching the sacrificial material from the second set of trenches, filling the second set of trenches with an electrode material, and providing separate wiring connections to the first set of trenches and the second set of trenches.
Etching the sacrificial material from the first set of trenches further includes removing sacrificial material from a surface of the device, and masking the second set of trenches.
Prior to forming the junction layers, the doped material of the second conductivity is removed from a surface of the device. Forming junction layers further includes depositing a diffusion barrier layer over the surface of the device prior to forming the junction layers, and removing the diffusion barrier layer from a surface of the device after forming the junction layers.
Providing separate wiring connections further comprises the step of exposing the doped material filling the first set of trenches and the electrode material filling the second set of trenches to a surface of the device. The electrode material is one of doped material of the first conductivity and undoped material.
According to an embodiment of the present invention, a method is provided for forming an optical detector device on a semiconductor substrate. The method includes forming a first set and a second set of trenches in the substrate, wherein trenches of the first set are alternately disposed with respect to trenches of the second set, filling the trenches with a sacrificial material, and etching the sacrificial material from the first set of trenches. The method further includes forming a junction layer in the wall of each of the first set of trenches by gas phase doping, forming a second junction layer in the wall of each of the second set of trenches, wherein dopants are driven from the sacrificial material into the walls, filling the first set of trenches with a doped material of a first conductivity, etching the sacrificial material from the second set of trenches, filling the second set of trenches with a doped material of a second conductivity, and providing separate wiring connections to the first set of trenches and the second set of trenches.
Etching the sacrificial material from the first set of trenches includes removing the sacrificial material from a surface of the device, and masking the second set of trenches. Etching the sacrificial material from the second set of trenches further comprises the step of removing doped material of the first conductivity from a surface of the device.
Providing separate wiring connections includes exposing the doped material filling the first set of trenches and the doped material filling the second set of trenches to a surface of the device.
REFERENCES:
patent: 5656535 (1997-08-01), Ho et al.
patent: 5994751 (1999-11-01), Oppermann
patent: 6177289 (2001-01-01), Crow et al.
patent: 6228750 (2001-08-01), Shibib
U.S. Patent Application Ser. No. 09/678,315, filed Oct. 3, 2000, for “Silicon-on-Insulator (SOI) Trench Photodiode and Method of Forming Same”.
Rong-Heng Yuang et al., “Overall Performance Improvement in GaAs MSM Photodetectors by Using Recessed-Cathode Structures”, IEEE Photonics Technology Letters, vol. 9, No. 2, Feb. 1997.
Jacob Y.L. Ho and K.S. Wong, “Bandwidth Enhancement in Silicon Metal-Semiconductor-Metal Photodetector by Trench Formation”, IEEE Photonics Technology Letters, vol. 8, No. 8, Aug. 1996.
Rim Kern
Yang Min
F. Chau & Associates LLP
Kunemund Robert
Vinh Lan
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