Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – With pn junction isolation
Reexamination Certificate
2000-07-18
2002-05-14
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
With pn junction isolation
C257S656000
Reexamination Certificate
active
06388306
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to semiconductor devices such as a diode having a PN junction which is required to provide a high breakdown voltage and a rapid reverse recovery characteristic.
2. Description of the Background Art
Diodes are required to provide a high breakdown voltage and a rapid reverse recovery characteristic as flow-back diodes or voltage-clamping diodes needed in applications of high-voltage switching device such as IGBTs (Insulated Gate Bipolar Transistors) and GCTs (Gate Commutated Turn-off Thyristors).
FIG. 13
is a cross-sectional view showing a sectional structure of a conventional common diode which meets the needs stated above. As shown in this diagram, an N
−
layer
601
as a semiconductor substrate of silicon etc. is formed on an N
+
layer
603
and a P layer
602
is formed on the N
−
layer
601
. The concentration of N-type impurity is higher in the N
+
layer
603
than in the N
−
layer
601
.
An anode electrode
604
made of a low-resistant metal is formed on the P layer
602
and a cathode electrode
605
made of a low-resistant metal as well as the anode electrode
604
is formed under the N
+
layer
603
.
The lifetime in the vicinity of the PN junction is controlled by proton irradiation etc. and a center of carrier recombination is formed. The lifetime in the entire semiconductor substrate is controlled and shortened by techniques such as diffusion of precious metal, irradiation of electron beam, etc.
When a reverse bias is applied to a diode in which a current is flowing in the forward direction by instantaneously switching an external circuit, the current once reaches zero but does not immediately recover in the reverse direction because of the accumulation of minority carriers in the diode, and a large reverse current (a current having a current decreasing rate determined by the reverse bias value and the inductance of the external circuit) transiently flows for a certain period. This reverse current flows until the excess carriers in the vicinity of the PN junction reduce below a certain concentration and a depletion layer is formed.
When a depletion layer is formed, a reverse voltage starts developing; the reverse voltage gradually increases as the depletion layer expands and the reverse current gradually decreases. Then the device voltage becomes steady equal to the applied reverse voltage and the reverse recovery operation is thus finished.
In a conventional diode having a structure like that shown in
FIG. 13
, the lifetime in the vicinity of the PN junction is locally controlled and shortened to realize characteristics of low forward voltage, small reverse recovery current (the peak value of the reverse current) and high di/dt strength (the maximum value of the current decreasing rate di/dt which can be given without damaging the diode).
However, when the reverse bias voltage is high in the reverse recovery operation, the applied voltage of the diode rapidly oscillates to generate such noise as may cause malfunction of the peripheral electric equipment. It is supposed that such voltage oscillation in diode is caused as shown below.
A diode in the reverse recovery operation has a capacitance component defined by the depletion layer and excess carriers as parameters and a resistance component defined by the applied voltage, leakage current and recombination current of the excess carries as parameters. The resistance component, the capacitance component and the inductance component of the external circuit for applying the reverse voltage form an LCR series circuit. The capacitance component and the resistance component of the diode vary with time. The resistance component rapidly increases when the excess carriers outside the depletion layer have disappeared, and the natural oscillation condition of the LCR series circuit is reached and voltage oscillation occurs. The resistance component rapidly varies to cause voltage oscillation also when the depletion layer reaches the N
+
layer
603
.
SUMMARY OF THE INVENTION
According to a first aspect of the present invention, a semiconductor device comprises: a first conductivity type first semiconductor layer; a first conductivity type second semiconductor layer being formed on the first semiconductor layer, the second semiconductor layer having a lower impurity concentration of the first conductivity type than the first semiconductor layer; a second conductivity type third semiconductor layer being formed on the second semiconductor layer; a first main electrode formed over the third semiconductor layer; and a second main electrode formed under the first semiconductor layer; wherein the film thickness of the second semiconductor layer is set to satisfy both of a first condition that a depletion layer extending from a PN junction at an interface between the second semiconductor layer and the third semiconductor layer does not reach the first semiconductor layer when a reverse voltage of about ½ to ⅔ of the reverse-direction voltage blocking capability of the PN junction is applied to the first and second main electrodes, and a second condition that the depletion layer extending from the PN junction reaches the first semiconductor layer when a reverse voltage exceeding about ⅔ of the voltage blocking capability is applied to the first and second main electrodes.
Preferably, according to a second aspect of the invention, in the semiconductor device, the first main electrode includes a main electrode formed directly on the third semiconductor layer, and the second main electrode comprises a main electrode formed directly on the underside of the first semiconductor layer.
Preferably, according to a third aspect of the invention, the semiconductor device further comprises: a second conductivity type fourth semiconductor layer being formed under the first semiconductor layer, and wherein the first main electrode includes a main electrode formed directly on the third semiconductor layer and the second main electrode includes a main electrode formed directly on the underside of the fourth semiconductor layer.
Preferably, according to a fourth aspect of the invention, the semiconductor device further comprises: a second conductivity type fourth semiconductor layer being formed under the first semiconductor layer; and a first conductivity type fifth semiconductor layer being formed on the third semiconductor layer, and wherein the first main electrode includes a main electrode formed directly on the fifth semiconductor layer and the second main electrode includes a main electrode formed directly on the underside of the fourth semiconductor layer.
Preferably, according to a fifth aspect of the invention, in the semiconductor device, the third semiconductor layer comprises a plurality of semiconductor regions formed selectively in a surface of the second semiconductor layer, and the first main electrode comprises a plurality of partial electrodes formed on the plurality of semiconductor regions, respectively.
Preferably, according to a sixth aspect of the invention, in the semiconductor device, the lifetime in the vicinity of the interface between the second and third semiconductor layers is set shorter than the lifetime in the vicinity of the interface between the first and second semiconductor layers.
Preferably, according to a seventh aspect of the invention, in the semiconductor device, the second condition includes a condition that the depletion layer extending from the PN junction reaches the first semiconductor layer when a reverse voltage equivalent to the voltage blocking capability is applied to the first and second main electrodes.
Preferably, according to an eighth aspect of the invention, in the semiconductor device, the impurity concentration of the second semiconductor layer is set to satisfy a third condition that electric field which acts on the depletion layer when a reverse bias voltage equivalent to the voltage blocking capability is set is at an actual use level not
Hirano Noritoshi
Satoh Katsumi
Mitsubishi Denki & Kabushiki Kaisha
Nelms David
Nguyen Thinh
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