Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
1998-10-07
2002-05-28
Kunemund, Robert (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S720000, C438S723000, C438S724000
Reexamination Certificate
active
06395637
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for fabricating an inductor and, more particularly, to a method for fabricating a spiral inductor used in a monolithic microwave integrated circuit on a silicon substrate using semiconductor fabrication processes.
2. Description of the Related Arts
Passive elements, such as spiral inductors and capacitors, have been formed in an integrated circuit on GaAs and Si substrate. However, the most important factor of the spiral inductor, quality factor Q, deteriorates by means of undesired characteristics such as parasitic resistance and capacitance, and the self resonant frequency (fwo) becomes lower. Accordingly, it is very difficult to directly apply them to a high frequency integrated circuit. To overcome these characteristic problems, a low-resistance metal line, such as a Au layer, has been used for reducing the parasitic resistance and a thick metal wire has been used for reducing the parasitic capacitance. Further, an improvement of the passive elements has been achieved by making the thickness of a dielectric layer thick, reducing the parasitic capacitance.
However, considering that the aluminum layer is more used than the gold layer in the CMOS processes, it is very difficult to make a high performance spiral inductor using a dry etching pattern process in case where a metal wire is formed to a thickness of approximately over 1 &mgr;m to reduce the resistance and a photoresist layer is used as an etching mask in the photolithograpy processes.
Although a great deal of labor has been made in order to implement an inductor on a silicon substrate, using the semiconductor integrated circuit processing techniques, it is difficult to manufacture a high performance spiral inductor because of the loss of electromagnetic wave and the parasitic component. Also, since resistance of a metal wire, which is used in a coil of the inductor, considerably has influence on inductor's feature, a recently advanced study makes an attempt to reduce the resistance, by providing three-layer or four-layer metal wire with the inductor coil. However, this multi-layer structure needs complicated processes and very expensive fabrication cost. The selection of the low resistance metal wire for lowering resistance of the inductor is restricted within narrow limits in that it should be formed on the silicon substrate.
Referring now to
FIGS. 1A and 1B
, a first dielectric layer
2
is formed on a silicon substrate
1
and a first metal wire
3
having a predetermined width is formed on the first dielectric layer
2
. A second dielectric layer
4
, which has a via hole
5
to expose a portion of the first metal wire
3
, is formed on the resulting structure and then an upper layer (inductor) formed on the second dielectric layer
4
is electrically connected to the first metal wire
3
through the via hole
5
. A second metal wire
7
as a spiral inductor is formed on the second dielectric layer
4
, being in contact with the first metal wire
3
. Further, a passivation layer
9
is formed on the second dielectric layer
4
and the second metal wire
7
. As shown in
FIG. 1B
, the first metal wire
3
is electrically connected to the second metal wire
7
through the via hole
5
and the second metal wire
7
has a spiral shape with center in the via hole
5
.
As illustrated in
FIGS. 1A and 1B
, in the conventional inductor forming the second metal wire in the silicon substrate, the inductor pattern of the second metal wire is formed by the dry etching process using a photoresist layer as an etching mask. Accordingly, since the selective etching ratio of the second metal wire to the photoresist layer is low, it is restricted to increase the thickness of the second metal wire. Also, three or four metal wires can be employed to reduce resistance of the inductor, but this multilayer structure is very expensive and requires complicated processes. Further, the DI (deionized water) clearing process is required to eliminate corrosion of the metal wire which is caused by the reaction in which chlorine generated in dry etching of the metal wire reacts on the photoresist layer with the complication of the fabricating processes.
Also, in fabricating the conventional spiral inductor, although air bridge process has been used when the second metal wire of the inductor coil intersects the first metal wire or Au layer has been used for reducing resistance of the metal wire, these methods cannot be easily applied to the monolithic microwave integrated circuit on the silicon substrate.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a method for fabricating a spiral inductor which is applied to the monolithic microwave integrated circuit on the silicon with facility.
Another object of the present invention is to provide a method for fabricating a spiral inductor having low resistance, high quality factor Q and high self resonant frequency.
In accordance with an aspect of the present invention, there is provided a method for fabricating an inductor, comprising the steps of: forming a first dielectric layer on a silicon substrate and forming a first metal wire on the first dielectric layer, wherein the first metal wire is in contact with an active element formed on the silicon substrate; forming a second dielectric layer on the resulting structure and forming an opening exposing the first metal wire; forming a second metal wire which is electrically connected with the first metal wire; forming a spiral dielectric pattern on the second metal wire; and etching the second metal wire using the spiral dielectric pattern as an etching mask, thereby forming a spiral metal wire.
In accordance with another aspect of the present invention, there is provided a method for fabricating an inductor, comprising the steps of: forming a first dielectric layer on a silicon substrate and forming a first metal wire on the first dielectric layer, wherein the first metal wire is in contact with an active element formed on the silicon substrate; forming a second dielectric layer on the resulting structure and forming a first opening and recesses exposing the first metal wire; forming a second metal wire which is electrically connected with the first metal wire; forming a first spiral dielectric pattern on the second metal wire; etching the second metal wire using the first spiral dielectric pattern as an etching mask, thereby forming a first spiral metal wire; forming a third dielectric layer on the resulting structure and patterning the third dielectric layer to expose the second metal wire through a second opening and recesses; and forming a third metal wire which is electrically connected with the second metal wire; forming a second spiral dielectric pattern on the third metal wire; and etching the third metal wire using the second spiral dielectric pattern as an etching mask, thereby forming a second spiral metal wire.
In accordance with further another aspect of the present invention, there is provided a method for fabricating an inductor, comprising the steps of: forming a first dielectric layer on a silicon substrate and forming a first metal wire on the first dielectric layer, wherein the first metal wire is in contact with an active element formed on the silicon substrate; forming a second dielectric layer on the resulting structure and forming an opening exposing the first metal wire; forming a second metal wire which is electrically connected with the first metal wire; forming a first spiral dielectric pattern on the second metal wire; etching the second metal wire using the first spiral dielectric pattern as an etching mask, thereby forming a first spiral metal wire; forming a third dielectric layer on the resulting structure and patterning the third dielectric layer to expose the second metal wire through an opening; forming a third metal wire which is electrically connected with the second metal wire; forming a second spiral dielectric pattern on the third metal wire; and etching the third metal wire using the
Kim Cheon Soo
Park Min
Yu Hyun Kyu
Brown Charlotte A.
Electronics and Telecommunications Research Institute
Jacobson & Holman PLLC
Kunemund Robert
LandOfFree
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