Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2000-02-17
2002-07-23
Quach, T. N. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S758000, C257S760000
Reexamination Certificate
active
06424042
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a manufacturing method thereof. More particularly, the present invention relates to a semiconductor device such as a memory apparatus or an information processing apparatus containing electrodes and interconnections, and to a manufacturing method thereof.
2. Description of the Background Art
In a semiconductor device such as a memory apparatus or an information processing apparatus, there has been extensively adopted an interconnection having a Damascene structure using a low resistance material such as AlCu or Cu as an interconnection material, along with the increased level of integration and the increased speed of operation. The interconnection having the Damascene structure is formed by forming a recess in an interlayer film or the like for containing an wiring portion and a contact portion, filling the recess with an interconnection material, and removing an unnecessary portion of the interconnection material other than the portion thereof filled in the recess by CMP (Chemical Mechanical Polishing).
At the step of removing the unnecessary portion of the interconnection material by CMP, a portion near the surface of the interconnection material buried in the above-described recess is removed together with the unnecessary portion. As a result, a dish-like depression is liable to be formed on the surface portion of the interconnection having the Damascene structure. Hereinafter, such a phenomenon is referred to as a “dishing”.
The above-described dishing reduces the film thickness of an interconnection, to increase the resistance of the interconnection and to degrade the flatness of the interconnection. The dishing significantly occurs at a portion having a large area as compared with wiring portions, specifically, at a contact pad portion provided in an intermediate layer of the semiconductor device and a bonding pad portion provided at the uppermost layer of the semiconductor device.
The dishing significantly occurring at the contact pad portion increases the resistance of the interconnection and degrades the flatness of the intermediate layer, thereby making it difficult to form a desirable multilayer interconnection structure. The dishing significantly occurring at the bonding pad portion increases the resistance of the interconnection and degrades the flatness of the uppermost layer, thereby tending to cause a bonding failure. In this way, the prior art interconnection having the Damascene structure has been largely affected by the dishing.
SUMMARY OF THE INVENTION
The present invention has been conceived to solve the previously-mentioned problems, and a first object of the present invention is to provide a semiconductor device having an interconnection structure capable of sufficiently suppressing the resistance of an interconnection irrespective of occurrence of the dishing, and a manufacturing method thereof.
A second object of the present invention is to provide a semiconductor device having an interconnection structure capable of suppressing occurrence of the dishing, and a manufacturing method thereof.
The above objects of the present invention are achieved by a semiconductor device including an interconnection having a Damascene structure. The device includes an interconnection layer formed on an interlayer film layer. An interconnection is provided so as to have single layer portion contained in a recess formed in the interconnection layer and a double layer portion contained in a recess formed in both the interconnection layer and the interlayer film layer. The double layer portion is formed on an insulating film.
The above objects of the present invention are achieved by a semiconductor device including an interconnection having a Damascene structure. The device includes an interconnection contained in a recess formed in an interconnection layer. A plurality of dummies made from an insulating material are provided in the interconnection. Each of the dummies is a projection which has a specific height and extends from the bottom surface to the top surface of the interconnection. The above objects of the present invention are achieved by a method for manufacturing a semiconductor device including an interconnection having a Damascene structure. In the method, an insulating film of an interconnection layer is formed on an interlayer film of an interlayer film layer. A first recess is formed in the interlayer film. A second recess larger than the first recess is formed in the insulating film so as to overlap with the first recess. The first recess and the second recess are filled with a conductive material, thereby formed an interconnection. The interconnection is formed so as to lie on an insulating film in the first recess.
Other objects and further features of the present invention will be apparent from the following detailed description when read in conjunction with the accompanying drawings.
REFERENCES:
patent: 5381046 (1995-01-01), Cederbaum et al.
patent: 5926732 (1999-07-01), Matsuura
patent: 6010955 (2000-01-01), Hashimoto
patent: 6225211 (2001-05-01), Tsui
patent: 7-240466 (1995-09-01), None
patent: 8-222630 (1996-08-01), None
patent: 10-284492 (1998-10-01), None
patent: 10-321623 (1998-12-01), None
McDermott & Will & Emery
Mitsubishi Denki & Kabushiki Kaisha
Quach T. N.
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