Method of fabricating a silicon solar cell

Details Method of fabricating a silicon solar cell Method of fabricating a silicon solar cell

1999-12-30

2002-01-08

Hiteshew, Felisa (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S725000, C136S256000

Reexamination Certificate

active

06337283

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a method of fabricating a solar cell, and more particularly to a method of fabricating a back surface point contact silicon solar cell.
2. Description of the Related Art
The silicon solar cell generates electrical charge when exposed to solar radiation. The radiation interacts with atoms of the silicon and forms electrons and holes which migrate to p-doped and n-doped regions in the silicon body and create voltage differentials between the doped regions. U.S. Pat. No. 4,234,352 discloses a solar energy convertor which includes a parabolic cone radiation concentrator portion and a processor portion including a radiator that absorbs concentrated radiation and generates incandescent radiation. A silicon solar cell receives the incandescent radiation and generates the voltage differentials between the doped regions. U.S. Pat. No. 4,927,770 discloses a back surface point contact silicon solar cell to be suitable for the concentrator solar cell.
Since the concentrator solar cells generate a lot of current (e.g., 10 A/cm
2
or more for concentration×200 to 500) and have a low voltage (e.g., 0.8 V), the series resistance of the solar cell must be small (such as less than 0.003 &OHgr;-cm). To attain this very low value of series resistance, the metallization of the solar cell should have a double layer of metallization as described in the aforesaid patent (U.S. Pat. No. 4,927,770).
In this kind of solar cell, the first layer of metallization contacts the semiconductor positive and negative contacts (the p-doped and n-doped regions) in a very fine pattern to insure a high efficiency under high concentration. The second layer of metallization maintains a low series resistance and must be solderable. In between these two layers of metallization, there must be a layer of an insulator (dielectric) material such as silicon oxide or alumina oxide as is disclosed in the aforesaid patent (U.S. Pat. No. 4,927,770).
In the concentrator silicon solar cell, because of the high concentration ratio (e.g., ×200 to 500, or incident power density of 20 to 50 W/cm
2
), the first metal layer is very thick (e.g., 2 to 4 &mgr;m). This high thickness of the first metal layer and the intermetal insulator may sometimes make proper deposition of the second thin metal layer (e.g., 1 to 2 &mgr;m) over the patterned insulator layer difficult, causing the second metal layer to have poor conductivity or worse, to break.
Moreover, when soldering the cell onto a metallized substrate (made of aluminiumnitride (ALN) or alumina (Al
2
O
3
), for example), the formation of voids (i.e., bubbles, pinholes or cracks) is much greater on a non-smooth cell surface. In other words, less voids will happen during soldering when the cell surface is well planarized. Also, the solder fatigue due to the difference in thermal expansion is much less on the smooth surface than on a surface with severe topography (unevenness). Thus, the surface of the cell to be soldered onto a metallized substrate should preferably be as planarized and even as possible.
SUMMARY OF THE INVENTION
An object of this invention is therefore to provide an improved method of fabricating a silicon solar cell having a double layer of metallization, whose surface to be soldered onto a metallized substrate is well planarized and even to ensure sufficient conductibility, with less voids and less solder fatigue.
In order to achieve this object, there is provided a method of fabricating a silicon solar cell having p-doped regions and n-doped regions on a same side, comprising the steps of: (a) forming a passivating layer on a surface of the cell having opened windows at the p-doped regions and the n-doped regions; (b) depositing and patterning a first metal layer on the passivating layer in such a way that the first metal layer comes into contact with the p-doped regions and the n-doped regions; (c) depositing a first insulator layer of polyimide on the first metal layer; (d) etching and patterning the first insulator layer of polyimide in such a way that the insulator layer has opened windows at, at least one of the p-doped regions and the n-doped regions: (e) depositing a second insulator layer of polyimide on the first insulator layer of polyimide; (f) etching and patterning the second insulator layer of polyimide in such a way that the insulator layer has opened windows at, at least one of the p-doped regions and the n-doped regions; (g) curing the first insulator layer of polyimide by heating at a predetermined second temperature for a predetermined second time; and (h) depositing a second metal layer on the second insulator layer of polyimide in such a way that the second metal layer comes into contact with the one of the p-doped regions and the n-doped regions.


REFERENCES:
patent: 4234352 (1980-11-01), Swanson
patent: 4320251 (1982-03-01), Narasimhan et al.
patent: 4864016 (1989-09-01), DuPont et al.
patent: 4927770 (1990-05-01), Swanson
patent: 5282902 (1994-02-01), Matsuyama
patent: 5543333 (1996-08-01), Holdermann
patent: 5591565 (1997-01-01), Holdermann et al.
patent: 6107563 (2000-08-01), Nakanishi et al.

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