Method of driving plasma display panel

Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix

Reexamination Certificate

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Details

C345S093000

Reexamination Certificate

active

06417824

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of driving a plasma display panel (hereinafter referred to as the “PDP”) in accordance with a matrix display scheme.
2. Description of the Related Background Art
As one type of PDP driven in accordance with the matrix display scheme as mentioned, an AC (alternate current discharge) type PDP is known.
The AC type PDP comprises a plurality of column electrodes (address electrodes) and a plurality of pairs of row electrodes which are arranged orthogonal to the column electrodes and form respective scanning lines in pair. The respective row electrode pairs and column electrodes are covered with a dielectric material defining a discharge space, and are constructed to form a discharge cell corresponding to one pixel at the intersection of each row electrode pair and each column electrode.
In this event, since the PDP utilizes a discharge phenomenon, the discharge cells only have two states, i.e., “light emission” and “non-light emission.” Thus, a subfield method is typically employed to realize gradation luminance representations in the PDP. The subfield method divides one field period into N subfields, each of which is allocated a light emission period (the number of times of light emission) corresponding to a weighting for each bit digit of pixel data (composed of N bits) to drive the PDP to emit light.
When one field period is divided, for example, into six subfields SF
1
-SF
6
as shown in
FIG. 1
, the light emission driving is conducted with the following light emission period ratio allocated to the respective subfields:
SF
1
: 1
SF
2
: 2
SF
3
: 4
SF
4
: 8
SF
5
: 16
SF
6
: 32
For example, the light emission is conducted only in SF
6
within the subfields SF
1
-SF
6
when a discharge cell is driven to emit light at luminance “32,” while the light emission is conducted in the remaining subfields SF
1
-SF
5
except for the subfield SF
6
when a discharge cell is driven to emit light at luminance “31.” This enables luminance representations with gradation of 64 levels. In this event, a light emission driving pattern within one field period for driving the discharge cell to emit light at luminance “32” is reverse to that for driving the discharge cell to emit light at luminance “31.” In other words, during one field period, a discharge cell which should be driven to emit light at luminance “31” is in non-light emitting state in a period in which a discharge cell which should be driven to emit light at luminance “32” is emitting light, and the discharge cell which should be driven to emit light at luminance “32” is in non-light emitting state in a period in which a discharge cell which should be driven to emit light at luminance “31” is emitting light.
Therefore, if there is a region in which a discharge cell which should be driven to emit light at luminance “32” and a discharge cell which should be driven to emit light at luminance “31” are located adjacent to each other, a spurious border can be viewed within this region. More specifically, when the line of sight is moved to a discharge cell which should be driven to emit light at luminance “32” immediately before a discharge cell which should be driven to emit light at luminance “31” transitions from a non-light emitting state to a light emitting state, the non-light emitting state of both the discharge cells are viewed in succession, causing a dark line to be viewed on the boundary of both the discharge cells. This dark line eventually appears on the screen as a spurious border which is not at all related to any pixel data, thus resulting in a degraded display quality.
In addition, since the PDP utilizes the discharge phenomenon as mentioned above, the PDP must conduct discharges (involving light emission) not related to the contents of a display, giving rise to a problem that the contrast is degraded in images.
Further, a general challenge in commercializing such PDP at present is to realize lower power consumption.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a method of driving a plasma display panel which is capable of improving the contrast at low power consumption while suppressing spurious borders, and capable of stabilizing selective discharge to improve the display quality.
The method of driving a plasma display panel is adapted to display gradation representations in a plasma display panel having row electrode pairs arranged for respective scanning lines, a plurality of column electrodes arranged intersecting with the row electrode pairs, and discharge cells, each corresponding to one pixel, formed at respective intersections of the row electrode pairs for the respective scanning lines and the plurality of column electrodes. The method comprises the steps of dividing one field display period into N subfields, where N is an integer number equal to or larger than two, and forming M consecutively positioned subfields within the N subfields into a subfield group, where 2≦M≦N is satisfied; executing, only in the first subfield of the subfield group, a reset stage for producing a discharge for initializing all the discharge cells into a light emitting cell state; executing, in any subfield within the subfield group, a pixel data writing stage for applying the column electrodes with pixel data pulses to produce a discharge for setting the discharge cells to non-light emitting cells, and for sequentially applying one electrode in each of the row electrode pairs with a scanning pulse in synchronism with the pixel data pulses; executing, in each subfield within the subfield group, a light emission sustaining stage for producing a discharge to drive only the light emitting cells to emit light a number of times corresponding to a weighting for the subfield; selecting one from a first mode in which the number of times of light emission in the light emission sustaining stage in each subfield of the subfield group is set to a first value, and a second mode in which the number of times of light emission in the light emission sustaining stage in each subfield of the subfield group is set to a second value smaller than the first value; and setting at least one of the values of a pulse width and a pulse voltage of the scanning pulse in each subfield within the subfield group when the second mode is selected larger than the value of the pulse width or the pulse voltage of the scanning pulse in each subfield within the subfield group when the first mode is selected.


REFERENCES:
patent: 5724053 (1998-03-01), Nagakubo
patent: 5757343 (1998-05-01), Nagakubo

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