Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Converting input current or voltage to output frequency
Reexamination Certificate
2000-09-14
2002-07-02
Cunningham, Terry D. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Converting input current or voltage to output frequency
C327S157000, C327S277000, C331S057000, C331S185000
Reexamination Certificate
active
06414522
ABSTRACT:
TECHNICAL FIELD
The present invention relates to an improved bias generating circuit portion of a charge pump circuit of a semiconductor integrated circuit device, and more particularly to such an improved charge pump bias generating circuit outputting a ramped oscillation signal to an oscillating circuit thereby decreasing the instantaneous power drain of the charge pump circuit upon start up.
BACKGROUND OF THE INVENTION
Charge pumps circuits for a semiconductor integrated circuit device are well known in the art. They are used typically to pump up a voltage supply, external to the semiconductor integrated circuit device, to a higher level for use within the semiconductor integrated circuit device. Thus, they can be used to boost an externally supplied voltage to a high voltage for use in non-volatile memory applications, Typically, a charge pump circuit consists of an oscillating circuit as well as a bias generator circuit which supplies the voltage to the oscillating circuit. The oscillating circuit is typically a circuit that responds to the voltage level from the bias generator and generates a signal whose frequency depends upon the voltage from the bias generator.
Referring to
FIG. 1A
, there is shown a circuit diagram of the bias generator circuit
12
and oscillator circuit
11
of a charge pump circuit
10
of the prior art. The bias generator circuit
12
receives a pump enable signal
8
and generates bias signal
20
which is supplied to the oscillator circuit
11
. In addition, the bias generator
12
supplies the pump enable signal
8
and the inverse pump enable signal
22
to the oscillator circuit
11
. The bias generator circuit
12
comprises an inverter
14
which receives the pump enable signal
8
. The output of the inverter
14
is connected to the gate of a PMOS transistor
16
having one terminal connected to the source of an operating voltage VDD and a second terminal connected to one end of a resistor
17
. The other end of the resistor
17
is connected to an NMOS transistor
18
at one terminal thereof as well as to its gate. Finally, the other terminal of the NMOS transistor
18
is connected to ground. The pump enable signal
8
is also supplied to the oscillator circuit
11
. The output of the inverter
14
is supplies as the inverse pump enable signal
22
to the oscillator circuit
11
. Finally, the gate of the NMOS transistor
18
is the bias signal
20
which is supplied to the oscillator circuit
11
.
The oscillator circuit
11
is of well known design and comprises essentially a timing circuit which generates a clock signal having a frequency which depends upon the voltage of the bias signal
20
.
In operation, when the pump enable signal
8
is generated (active high) causing the bias generator
12
to generate the bias signal
20
which is supplied to the oscillator circuit
11
, the oscillator circuit
11
would begin to oscillate. A simulation of the output of the oscillator circuit
11
at output is shown in FIG.
1
B. As can been seen, during initial start up (i.e. as soon as the pump enable signal
8
is active high) there is a large spike in voltage, as can be seen by the left side of FIG.
1
B. This results in a temporary power surge within the chip caused by the huge di/dt. This power surge can cause problems in other portions of the semiconductor integrated circuit device such as triggering other signals such as power-on-reset or other signals incorrectly.
SUMMARY OF THE INVENTION
In accordance with the present invention, a charge pump of an integrated circuit device comprises a bias generating circuit with an input for receiving a pump enable signal and generates a ramped bias signal in response to the pump enable signal. A voltage control oscillator has an input for receiving the ramped bias signal and generates an oscillating signal having a frequency dependent upon the voltage of the ramped bias signal.
REFERENCES:
patent: 4922141 (1990-05-01), Lofgren et al.
patent: 5231319 (1993-07-01), Crafts et al.
patent: 5418499 (1995-05-01), Nakao
patent: 5544120 (1996-08-01), Kuwagata et al.
patent: 5559476 (1996-09-01), Zhang et al.
patent: 6064275 (2000-05-01), Yamauchi
patent: 6252467 (2001-01-01), Yoshimura
patent: 6188293 (2001-02-01), Miyagi et al.
Nguyen Hung Q.
Nguyen Sang
Cunningham Terry D.
Gray Cary Ware & Freidenrich LLP
Silicon Storage Technology, Inc.
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