Fishing – trapping – and vermin destroying
Patent
1994-04-21
1995-06-27
Chaudhuri, Olik
Fishing, trapping, and vermin destroying
437 60, 437 21, 437919, H01L 2170, H01L 2700
Patent
active
054279739
ABSTRACT:
A wafer bonding method for forming a SOI structure comprising the steps of bringing wafers into proximity in a state with one wafer a slight, substantially uniform clearance away from the other wafer and pressing one point of at least one wafer of the two wafers against the other wafer. In another aspect of the invention, there is provided a method of positioning for photolithography using an alignment mark portions and/or a vernier portions formed on a SOI substrate, which comprises the step of removing semiconductor layer portions corresponding to the alignment mark portions and/or the vernier portions. In further another aspect of the invention, there is provided a new DRAM semiconductor device formed by using SOI structure, which comprises a new pattern of a strage node formed longitudinally along a word line. Further, there is provided a new DRAM semiconductor device formed by using SOI structure, which comprises a unique storage node having a conductive side wall.
REFERENCES:
patent: 4970564 (1990-11-01), Kimura et al.
patent: 5013681 (0791-05-01), Godbey et al.
patent: 5034343 (1991-07-01), Rouse et al.
patent: 5102819 (1992-04-01), Matsushita et al.
patent: 5131968 (1992-07-01), Wells et al.
patent: 5185282 (1993-02-01), Lee et al.
patent: 5196365 (1993-03-01), Gotou
patent: 5229305 (1993-07-01), Baker
patent: 5231044 (1993-07-01), Jun
patent: 5231045 (1993-07-01), Miura et al.
patent: 5236118 (1993-08-01), Bower et al.
patent: 5262347 (1993-11-01), Sands
Nikkei Microdevices, Mar. 1988, pp. 82-84.
Abstracts of 21st Conference on Solid State Devices 1989, pp. 89-92.
Maszara et al., Journal on Applied Physics, vol. 64, pp. 4943-4950, Nov. 15, 1988.
J. B. Lasky, Applied Physics Letter 48(1), pp. 78-80, Jan. 6, 1986.
M. Shimbo et al., Journal on Applied Physics, 60(8), pp. 2987-2989, Oct. 15, 1986.
Hashimoto Makoto
Matsushita Takeshi
Nishihara Toshiyuki
Ohokubo Yasunori
Satoh Hiroshi
Chaudhuri Olik
Kananen Ronald P.
Sony Corporation
Tsai H. Jey
LandOfFree
Method for production of SOI transistor device having a storage does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for production of SOI transistor device having a storage , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for production of SOI transistor device having a storage will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-287079