Data processing: generic control systems or specific application – Specific application – apparatus or process – Product assembly or manufacturing
Reexamination Certificate
1999-04-15
2002-03-26
Grant, William (Department: 2121)
Data processing: generic control systems or specific application
Specific application, apparatus or process
Product assembly or manufacturing
C700S116000, C702S117000
Reexamination Certificate
active
06363295
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates in general to integrated circuit (IC) manufacturing. More specifically, it relates to methods in IC manufacturing processes for using data regarding manufacturing procedures IC's have undergone, such as repair procedures, to select procedures the IC's will undergo, such as additional repair procedures.
2. State of the Art
As shown in
FIG. 1
, a typical process
10
for manufacturing very small electronic circuits referred to as “Integrated Circuits” (IC's) begins with the IC's being formed or “fabricated” on the surface of a wafer
12
of semiconductor material, such as silicon. Once fabricated, IC's are electronically probed to determine whether they are functional (i.e., “good”) or nonfunctional (i.e., “bad”). If any IC's are found to be bad, an attempt is made to repair those IC's by replacing nonfunctional circuit elements in the IC's with spare circuit elements. For example, Dynamic Random Access Memory (DRAM) IC's are typically repaired by replacing nonfunctional rows or columns of memory cells in the IC's with spare rows or columns.
These repairs are not always successful, because the number of spare circuit elements on an IC may be exhausted before all nonfunctional circuit elements on the IC are replaced, and because some circuit elements on IC's have no spares to replace them. As a result, a number of bad IC's typically remain on a wafer
12
even after attempts are made to repair the IC's. The location of bad IC's on a wafer
12
, along with the location of any good IC's on the wafer
12
, is typically stored in a computer database commonly referred to as a “wafer map.”
After being probed and, if necessary, repaired, IC's begin an assembly process with their wafer
12
being mounted on an adhesive film. In some instances, the film is a special high-adhesion Ultraviolet (U.V.) film. Without cutting the adhesive film, IC's are sawed from their wafer
12
into discrete IC dice or “chips” using high-speed precision dicing equipment. IC dice mounted on U.V. film are then exposed to U.V. light to loosen the grip of the film on the dice. IC dice identified as good by their wafer map are then each “picked” by automated equipment from their sawed wafer
12
and its associated film and “placed” on an epoxy coated bonding site of one lead frame in a strip of interconnected lead frames, while IC dice identified as bad are discarded into a scrap bin
14
. The epoxy attaching the good IC dice to their lead frames is then cured, and the attached dice are wire bonded to their lead frames using high speed bonding equipment.
Once wire bonded, IC dice and their associated lead frames are formed into IC packages using a hot thermosetting plastic encapsulant injected into a mold. IC packages are then cured to set their plastic encapsulant. After encapsulation and curing, leads of the lead frames projecting from the packages are dipped in a cleansing chemical bath in a process referred to as “de-flash” and then electroplated with a lead/tin finish. Connections between lead frames in lead frame strips are then cut to “singulate” IC packages into discrete IC devices.
After assembly, discrete IC devices are tested in a simple electronic test referred to as an “opens/shorts” test, which checks for “opens” (i.e., no connection) within the devices where connections should exist and “shorts” (i.e., a connection) where connections should not exist. Devices that pass the opens/shorts test proceed on through the process
10
to various burn-in and test procedures where they are tested for functionality, operability, and reliability, and devices that pass these burn-in and test procedures are then typically shipped to customers.
IC devices that fail any of the opens/shorts, burn-in, and test procedures are checked to determine whether they are repairable. This “check” typically includes an electronic “querying” of a device to determine whether enough spare circuit elements remain in the device to effect necessary repairs. Devices determined to be unrepairable are scrapped in a scrap bin
16
, while devices that are repairable are repaired, typically by replacing nonfunctional circuit elements in the devices with spare circuit elements in the same manner as described above. After being repaired, these devices then reenter the manufacturing process
10
just prior to the opens/shorts, burn-in, or test procedures they failed.
Electronic querying of IC devices to determine whether spare circuit elements are available to effect repairs increases the time required to move the devices through the manufacturing process
10
and places an additional burden on expensive testing resources. While the extra time added by querying one IC device may be insignificant, the time required to query thousands and thousands of IC devices adds up and can result in a significant reduction in the number of IC devices completing the manufacturing process
10
in a given amount of time. Therefore, there is a need in the art for a method of determining whether enough spare circuit elements are available in an IC device to effect repairs without having to query the device.
Similarly, as shown in
FIG. 2
, a typical process
20
for manufacturing so-called “flip-chip” and “Chip-On-Board” (COB) Multi-Chip Modules (MCM's), in which multiple IC dice are typically attached directly to a substrate, such as a printed circuit board (PCB), begins with IC's being fabricated on the surface of a semiconductor wafer
22
in the same manner as described above. Once fabricated, IC's are electronically probed to determine whether they are good or bad, and if any IC's are found to be bad, an attempt is made to repair those IC's (i.e., make them good IC's) by replacing nonfunctional circuit elements in the IC's with spare circuit elements. The locations of good and bad IC's on a wafer
22
are then typically stored in an electronic wafer map.
After being probed and, if necessary, repaired, IC's begin an assembly process with their wafer
22
being mounted on an adhesive film. Without cutting this film, IC's are then sawed from their wafer
22
into discrete IC dice using high-speed precision dicing equipment. IC dice that are mounted on the special high-adhesion U.V. film described above are then exposed to U.V. light to loosen the grip of the film on the dice.
IC dice identified as good by their electronic wafer map are then each picked by automated equipment from their sawed wafer
22
and its associated film, typically for attachment to a substrate in a panel of multiple substrates, such as a panel of interconnected PCB's. If the assembly process is a flip-chip process, picked dice are then flipped and directly attached at their active, frontside surfaces to substrates to form MCM's. If the assembly process is a COB process, picked dice are directly attached at their inactive, backside surfaces to adhesive coated bonding sites of substrates to form MCM's. IC dice identified as bad are discarded into a scrap bin
24
.
Panels of MCM's are then cured. If the assembly process is a COB process, the MCM's may be plasma cleaned, if necessary, and the COB IC dice are then wire bonded to their substrates using high speed bonding equipment.
After assembly, panels of MCM's are tested in an opens/shorts test. Panels having COB IC dice that pass the opens/shorts test proceed on through the manufacturing process
20
so the dice can be encapsulated using an overmold, hard cover, or so-called “glob” top, while panels having flip-chip IC dice that pass the opens/shorts test may have their dice encapsulated using an underfill followed by an ovennold, hard cover, or glob top. As will be described in more detail below, alternatively flip-chip IC dice may be encapsulated after burn-in and test procedures. The disposition of panels of MCM's having COB and flip-chip attached IC dice that fail the opens/shorts te
Akram Salman
Farnworth Warren M.
Gochnour Derek J.
Hembree David R.
Hess Michael E.
Garland Steven R.
Grant William
TraskBritt
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