Robust engine variable vane monitor logic

Data processing: generic control systems or specific application – Generic control system – apparatus or process – Digital positioning

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C415S036000, C415S016000, C415S017000, C415S042000, C415S048000, C415S118000, C073S001790, C073S118040

Reexamination Certificate

active

06341238

ABSTRACT:

TECHNICAL FIELD
This invention is directed to a control system for verifying the proper operation of aircraft engine/surface actuator controls, and more particularly, to a control system for verifying the proper operation of a control associated with the inlet guide vanes (IGVCS) of an aircraft engine.
BACKGROUND ART
Increased demands for improved aircraft performance and reliability have resulted in the development of electronic controllers having multiple levels of redundant channels. These redundant channels can consist of redundant electronic channels and/or mechanical channels. In order to utilize the reliability benefits of multi-channel systems, various hardware and software built-in test (BIT) methodologies have been developed to provide high levels of fault coverage.
More specifically, for some modern aircraft, the inlet guide vane control system (IGVCS) has a dual lane architecture comprised of an electronic primary lane and a hydro-mechanical secondary lane. The IGVCS controls the inlet guide vane position as a function of engine speed adjusted for air inlet temperature. The electronic primary lane consists of two redundant channels, an active and a standby channel. The hydro-mechanical secondary lane serves as a back-up in the event of a failure of the two electronic channels.
In order to ensure proper operation of the IGVCS there are several levels of fault coverage provided by the BIT diagnostics. The first level is referred to as “In-Line Built-In Test ” (ILBIT). The ILBIT of the electronic primary lane includes signal range checks, processor checks, memory checks, output wrap around checks, etc., to isolate any faults within a specific channel.
The second level of fault coverage is provided by a cross channel comparison of the processed inputs and outputs of the active and standby channels to detect failures not detected by the ILBIT (XCHBIT). The second level is not capable of isolating the failure to one of the electronic channels and therefore must switch control from the electronic primary lane to the hydro-mechanical secondary lane.
A third level of fault coverage serves as a “last line of defense” against primary lane failure by utilizing the difference between simulated vane position, predicted in real time, and actual vane position to detect system failures which are not detectable by the ILBIT and XCHBIT. This difference is then evaluated using a Pass/Fail criteria to determine whether the actuator is tracking properly. This logic is present in both channels of the primary control lane so that if a failure occurs which causes the actuator position to track incorrectly, either channel has the capability to detect this and initiate a switch over to the secondary control lane.
The problem with the present art is that any tolerance which meets the above described criteria is not necessarily robust in the presence of external vane aerodynamic disturbances. In particular, this third level of coverage cannot distinguish between an actual fault and a naturally occurring aerodynamic disturbance such as surge or stall, resulting in erroneous transfer to the secondary/backup, reducing the reliability of the system by incorrectly concluding a system fault existed. For some engines, the probability of occurrence of a surge condition is much higher than the probability of failure of the vane hardware.
When transfer occurs a fault is indicated and maintenance action is required. Nuisance faults caused by false transfers result in wasted time and monetary resources and limits aircraft availability.
Therefore, there exists a need, for a fault detection system that can distinguish between actual system failures and temporary system disturbances, thus reducing system false alarm rates.
DISCLOSURE OF INVENTION
The primary object of this invention is to provide an improved control system for verifying the proper operation of aircraft engine/surface actuator controls.
Another object of this invention is to provide an improved methodology which can distinguish between actual system faults and temporary system disturbances.
A further object of this invention is to reduce aircraft maintenance time associated with nuisance faults.
Still another object of this invention is to provide BIT diagnostics for an IGVCS utilizing filtering of a comparison between a simulated inlet guide vane position and an actual inlet guide vane position to prevent transfer of control from the primary to secondary lane in the event of a false alarm, without compromising the ability to detect, in a timely manner, system faults and the appropriate corrective action.
The foregoing objects and following advantages are achieved by the test method of the present invention for distinguishing between actual system failures and temporary system disturbance not caused by failures.
The method includes the steps of initializing the primary system upon engine start; reading system inputs, calculating an ideal system output, reading the actual aircraft engine/surface actuation control position set by the primary control, calculating the difference between the ideal system output and actual control position setting, comparing the difference to a severe disturbance threshold, switching system control to the secondary/backup system if the difference exceeds the severe disturbance threshold, if the difference is less than the severe disturbance threshold, comparing the difference to a mild disturbance threshold and switching control to the secondary/backup system if the difference exceeds the mild disturbance threshold for greater than a predetermined time period.


REFERENCES:
patent: 4279568 (1981-07-01), Munroe
patent: 4610599 (1986-09-01), Long
patent: 5355691 (1994-10-01), Sullivan
patent: 5553997 (1996-09-01), Goshaw
patent: 5573032 (1996-11-01), Lenz
patent: 5618160 (1997-04-01), Harada
patent: 5851103 (1998-12-01), Harada
patent: 5873696 (1999-02-01), Harada
patent: 5927939 (1999-07-01), Harada
patent: 5938401 (1999-08-01), Modeen
patent: 5947680 (1999-09-01), Harada
patent: 6131449 (2000-10-01), Modeen et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Robust engine variable vane monitor logic does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Robust engine variable vane monitor logic, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Robust engine variable vane monitor logic will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2856071

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.