Organic electroluminescent device, and its fabrication method

Electric lamp and discharge devices – With luminescent solid or liquid material – Solid-state type

Reexamination Certificate

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C313S504000, C313S505000, C313S112000

Reexamination Certificate

active

06339291

ABSTRACT:

TECHNICAL FIELD
The present invention relates to an organic electroluminescent device used as a light source for displays, etc., and a method of fabricating the same.
BACKGROUND TECHNIQUE
An organic EL display using an organic electroluminescent (hereinafter called an organic EL) device has some advantages over a liquid crystal display that is a flat panel display currently in vogue in the field of display equipment, as indicated below.
(1) The organic EL device emits light spontaneously and so ensures a wide field angle.
(2) Thin type display equipment having a thickness of about 2 to 3 mm can be easily fabricated.
(3) The organic EL device can emit natural colors because of no need of using any polarizing plate.
(4) Clearer displays than ever before can be obtained because of a wide dynamic range for brightness.
(5) The organic EL device can operate over a wide temperature range.
(6) The organic EL device can present an easy display of dynamic images because its response speed is at least triple-digit faster than that of a liquid crystal device.
Regarding an organic EL device having such excellent features, however, it has so far been indicated that a problem arises in conjunction with reliability when it is used over an extended period of time. In particular, it is known that spots incapable of emitting light, called dark spots, occur on a light-emitting display surface of the organic EL device. The dark spots are responsible for luminance drops and, hence, image quality drops. A transparent conductive film such as an electrode film (often an indium tin oxide or ITO film, and hereinafter called the first electrode) is formed on a substrate. The dark spots are likely to occur on particles present on the first electrode. Usually, the first electrode is provided in an array form comprising a plurality of electrode elements, between which there is a step. The dark spots are also likely to occur from the step, because the ability of an organic film to cover the step is less than satisfactory.
At the step between the first electrode elements, electric field concentration is not only likely to occur but the organic film is also likely to become thin. It is then observed that these are combined with each other to cause much stronger light to be emitted at the step area rather than at a flat area in the first electrode array at an initial stage of light emission. It is also often observed that, with the lapse of time, the dark spots and interelectrode short circuiting are likely to occur at the step area in the first electrode array.
This phenomenon is due to a structural problem inherent in an organic EL device. Thus, some approaches to covering the step area in the first electrode array with an insulating film have been proposed so far in the art, as disclosed in JP-A's 3-250583, 3-274694 and 4-51494. A typical approach is explained just below.
A transparent conductive or ITO film is formed as a first electrode on a substrate as by a sputtering process, followed by patterning the ITO film into a given shape by photolithography. Then, an insulating film such as an SiO
2
film is formed all over the surface of the substrate, and a portion of the ITO film to emit light is exposed by photolithography. Following this, an organic film including a light-emitting layer is formed. Finally, a metal film composed mainly of Mg, for instance, is formed as a second electrode to oppose to the first electrode and be formed on the organic layer. The thus formed organic EL device has such architecture as illustrated in FIG.
1
.
However, this approach has the following problem. As can be seen from
FIG. 1
, when an insulating film
3
to cover a step in an ITO film (the first electrode)
2
formed on a substrate
1
is patterned by photolithography, it is required to preset an alignment margin for photolithography. Accordingly, the covering insulating film
3
is formed on the ITO film
2
. However, the portion of the insulating film
3
formed on the ITO film
2
makes no contribution to light emission and, consequently, the area of the portion that actually emits light (hereinafter called the effective light-emitting area) is decreased as compared with the area of the ITO film
2
. When a product is produced using a glass substrate of large size where at least one side is in the 300 mm class or more, the alignment margin needed for a projection aligner that has a high throughput yet is inexpensive is usually at least 5 &mgr;m. Accordingly, when a high-density yet compact display capable of displaying TV pictures in particular is produced, a decrease in the display area due to this alignment margin is as large as 10% or greater.
There is also a step in the insulating film
3
itself. Stress is likely to occur in portions of an organic layer
4
and a metal layer
5
that go over this step or in a protective layer (not shown) formed after the formation of these layers. With the occurrence of stress, an area including the organic layer
4
in direct contact with the ITO film
2
and the metal electrode formed thereon, i.e., a light-emitting area delaminates or otherwise fails. As a result, it is observed through the inventors' experimentation that the probability of occurrence of non-emitting spots such as dark spots becomes high.
The larger the effective light-emitting area, the better the image quality is, and so it is clearly desired to obtain a large effective light-emitting area. When an organic EL device having such a large effective light-emitting area is used to obtain the same amount of light emission as that obtained with an organic EL device having a small effective light-emitting layer, the service life of the former organic EL device is increased because the voltage supplied thereto can be lowered.
Thus, the aforesaid conventional approach involves an essential problem in conjunction with the fabrication of a display that has high reliability and is capable of high-luminance displays.
How to reduce a step in the formation of thin films has already been investigated in the fabrication process of VLSI (large scale integrated) semiconductor products represented by mass-storage DRAMs (dynamic random access memories). This is inevitably required in view of the hyperfine structure inherent in VLSIs. In a VLSI, as a thin film pattern becomes finer, there is a portion where step width is substantially equal to, or larger than, the pattern width. Unless such a step is filled up with an insulating film, it is then known that interconnecting lines formed on the misalignment have breaks or other failures. For a technique for filling up and thereby eliminating such a step, for instance, frequent use is made of CVD (chemical vapor deposition) process, and a CMP (chemo-mechanical polishing) process where an insulating thin film composed mainly of SiO
2
by a SOG (spin-on-glass) process is subjected to chemo-mechanical polishing or an etching-back process wherein this insulating thin film is etched back by dry-etching.
However, when these processes are applied to the fabrication process of organic EL displays to eliminate a step in the first electrode, such problems as mentioned just below arise. With the chemo-mechanical polishing process, there is a possibility of causing minute damage to the surface of the first electrode. With flaws in the surface of the first electrode, the light emission life of an organic EL device becomes short, possibly with the occurrence of dark spots. With the etching-back process by dry-etching, it is difficult to achieve uniform etching, resulting in the occurrence of an area where a corner of the misalignment in the first electrode is exposed. As a matter of course, thickness variations in the formation of the insulating film to be etched back are superposed on etching fluctuations.
Thus, it is found that the direct application of processes used so far in the fabrication process of VLSI semiconductor products have some problems. It is also found that the direct application of such processes, if not impossible, is difficult.
JP-A's 8-171989, 9-134787 and 9

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