Semiconductor memory device having a plurality of laser fuses

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics

Reexamination Certificate

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C257S209000, C257S225000, C365S096000

Reexamination Certificate

active

06448626

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor memory device, and more particularly, to a semiconductor memory device having a plurality of laser fuses.
2. Description of the Related Art
When a semiconductor memory device is fabricated, several parameters of the memory device are tested to determine whether it performs according to predetermined design constraints. If any one of the testing parameters is outside tolerance, this is taken as an indication that the device is defective. Consequently, the semiconductor memory device is discarded.
However, in the course of testing the operation of a semiconductor memory device including a plurality of primary memory cells for data storage, if some of the memory cells prove to be defective, the defective primary memory cells in question can be replaced by redundant memory cells fabricated on the device. This redundant configuration permits the semiconductor memory device to continue to operate in a normal state, even though some of the primary cells may be defective. The primary memory cells and redundant memory cells are all connected via fuses controlled by control circuits in the semiconductor memory device. As stated above, if a defective memory cell is discovered in a semiconductor memory device, then a fuse coupled to the defective memory cell is blown and the redundant memory cell is connected instead. Accordingly, the semiconductor memory device with defective primary cells can operate normally and is not discarded.
Highly integrated semiconductor memory devices have a fairly high manufacturing cost, which causes a large loss if any defective cells are discovered. This is why the memory devices include redundant memory cells with which to replace defective primary memory cells. Types of fuses deployed in such semiconductor memory devices include electrical fuses selectively cut by flow of excessive current, or “overcurrent”, and laser fuses selectively cut by applied laser beam. In contemporary systems, laser fuses are widely used due to their simplicity in use and layout. Electrical fuses are commonly used in semiconductor memory devices such as Electrically Erasable Programmable Read Only Memory (EEPROM) while the laser fuses are very often used in Dynamic Random Access Memory (DRAM).
FIG. 1
is a block diagram of a laser fuse box in a conventional semiconductor memory device
101
. In the device, laser fuses
111
-
114
formed on the device each have a predetermined width D and are separated from each other by a predetermined space E
1
. The laser fuses
111
-
114
include a fusing region
121
where fusing by a laser beam occurs. The laser fuses
111
-
114
are laid out at a right angle to the direction of the length L
1
of the fusing region
121
.
As shown in
FIG. 1
, there is a limit to the degree at which the size of the fusing region
121
can be reduced, since the primary axes of the laser fuses
111
-
114
are at right angles with respect to the direction of the length L
1
of the fusing region
121
. Such a limit restricts the reduction in the overall size of the semiconductor memory device
101
. In order to reduce the size of the fusing region
121
in this configuration, the laser spot size needs to be smaller, which is not a simple task to achieve. Therefore, any reduction in the size of the semiconductor memory device
101
requires that the area of the fusing region
121
be reduced.
Furthermore, U.S. Pat. No. 5,747,869 shows laser fuses having narrow ends and wide ends, of which the wide ends are portions to be fused. Since the wide ends are required to have a predetermined length for achieving a fusing operation, the laser fuses become longer, and accordingly, the area of the fusing region is not decreased.
SUMMARY OF THE INVENTION
To address the above limitations, it is an objective of the present invention to provide a semiconductor memory device including a plurality of laser fuses in which the width of a fusing region can be reduced.
Accordingly, to achieve the above objective, there is provided a semiconductor memory device having a plurality of laser fuses in which the plurality of laser fuses include a first region including the ends of one side of the plurality of laser fuses, a second region including the ends of the other side of the plurality of laser fuses, and a fusing region in which the laser fuses are fused, wherein the laser fuses of the fusing region are inclined so as to have a predetermined angle with respect to the first and second regions.
In the above semiconductor memory device, it is preferable that the space between the included portion of the laser fuses in the fusing region is narrower than those of the first and second regions, in which the laser fuses are formed of polysilicon or metal.
Furthermore, it is preferable that the laser fuses in the above fusing region are parallel to each other, and that the laser fuses in the first region are arranged parallel to those in the second region.
In another embodiment, the present invention is directed to a laser fuse for a semiconductor device. The laser fuse comprises first and second terminals formed on a semiconductor device, each terminal having a primary axis. A fuse region is formed on the semiconductor device coupled between the first and second terminals, the fuse region having a primary axis positioned at an angle relative to the primary axes of the first and second terminals.
In a preferred embodiment, the primary axes of the first and second terminals are parallel. The semiconductor device preferably comprises a memory device. The angle is preferably acute.
According to the present invention, the width, and thus the overall area, of the fusing region of the laser fuses can be reduced.


REFERENCES:
patent: 5747869 (1998-05-01), Prall et al.
patent: 6172896 (2001-01-01), Iee

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