Semiconductor device manufacturing: process – Chemical etching
Reexamination Certificate
2000-10-26
2002-09-24
Everhart, Caridad (Department: 2825)
Semiconductor device manufacturing: process
Chemical etching
C438S691000, C438S700000, C438S750000, C438S664000
Reexamination Certificate
active
06455428
ABSTRACT:
BACKGROUND OF THE INVENTION
(1) Field of the Invention
The present invention relates to methods used to fabricate semiconductor devices, and more specifically to a method used to form a metal silicide layer for a semiconductor device.
(2) Description of Prior Art
The use of metal silicide layers, formed on underlying source/drain, and polysilicon gate structures of semiconductor devices, has reduced word line and bit line resistance, thus improving the performance of these semiconductor devices, when compared to counterparts fabricated without metal silicide layers. Metal silicide layers have been formed using a self-align metal silicide (Salicide), process, in which a blanket metal layer is deposited, overlying both source/drain and polysilicon regions, as well as overlying insulator layers. Subsequent anneal procedures result in the formation of the desired metal silicide layer on source/drain, and polysilicon regions, while the metal remains unreacted in regions overlying insulator surfaces. Selective removal of the unreacted metal results in the attainment of metal silicide layers, self-aligned to conductive silicon or polysilicon regions.
For many cases a conductive region, such as a source/drain region of a metal oxide semiconductor field effect transistor (MOSFET), device, is prepared for metal silicide formation, via initially opening a contact hole, in an insulator layer, exposing the source/drain region. The contact hole opening is usually performed via wet or dry etching procedures, using a photoresist shape as an etch mask. Removal of the masking photoresist shape, prior to deposition of the metal layer, can be accomplished via dry or wet procedures. A commonly used, photoresist dry removal procedure is plasma oxygen ashing, resulting in the ashing or volatilization of the organic photoresist shape. This step however is performed with the top surface of the source/drain region exposed in the contact hole, thus resulting in the formation of a thin silicon oxide layer on the top surface of the exposed source/drain region. Removal of the silicon oxide layer is critical in allowing the desired metal silicide layer to be formed on the oxide free source/drain surface. However plasma oxygen ashing can form a silicon oxide layer, comprised of both stoichiometric silicon oxide (SiO
2
), as well as substoichiometric silicon oxide (SiO
x
), where X is greater than zero but less than two. The substoichiometric component of the native oxide formed on the top surface of the source/drain region during plasma oxygen ashing is difficult to remove via buffered hydrofluoric acid procedures, performed post plasma oxygen ashing, and thus can interfere with the objective of forming metal silicide layers on the conductive regions exposed in contact holes that have experienced as plasma oxygen ashing, photoresist removal procedure..
This invention will describe a process for forming a metal silicide layers on conductive region exposed in a contact hole, however without the conductive region, exposed in the contact hole, experiencing a photoresist removal procedure which employs an oxygen source which will create a native oxide, comprised of substoichiometric silicon oxide. The absence of an oxygen source, as for example created during a plasma oxygen ashing, photoresist shape removal procedure, allows the surface of a conductive region, located at the bottom of the contact hole, to remain oxide free, and thus remain in a more favorable state for subsequent metal silicide formation. Prior art, such as Sharan et al, in U.S. Pat. No. 6,090,707, describe a process for forming a metal silicide layer on a conductive silicon region, previously subjected to a oxygen containing photoresist removal procedure, which formed a native oxide comprised of both stoichiometric and substoichiometric silicon oxide on the top surface of the conductive layer on which metal silicide is to be formed on. That prior art then has to convert the difficult to remove, substoichiometric silicon oxide layer to a more easily removable stoichiometric silicon oxide, via a ozone treatment. In contrast this present invention removes the masking photoresist shape without the use of an oxygen component, thus avoiding native oxide growth on the surface of the conductive region in the contact hole, and thus avoiding additional process steps needed in prior art for conversion to, and removal of, silicon oxide. In addition this invention will describe a photoresist removal procedure in which a post-photoresist removal, wet cleanup procedure is employed, forming a native oxide, however with the native oxide only comprised with the easily removable stoichiometric silicon oxide component, not the difficult to remove substoichiometric silicon oxide component.
SUMMARY OF THE INVENTION
It is an object of this invention to from a metal silicide layer on the top surface of a conductive region, in a semiconductor substrate, exposed at the bottom of the contact hole opening in an insulator layer.
It is another object of this invention to remove the photoresist shape, used to define the contact hole opening, via a chemical mechanical polishing (CMP), procedure, or via a combination of a CMP procedure, and a sulfuric acid—hydrogen peroxide treatment, to maintain a silicon oxide free top surface, or a substoichiometric silicon oxide free top surface, for the conductive region exposed in the contact hole.
It is still another object of this invention to deposit a metal layer on the top surface of the conductive region, exposed in the contact hole, followed by an anneal cycle forming the desired metal silicide layer.
In accordance with the present invention a method of forming a metal silicide layer, on a conductive region in a semiconductor substrate, exposed at the bottom of a contact hole, is described. After forming a conductive region in a semiconductor substrate, an insulator layer is deposited. A photoresist shape is used as an etch mask to allow a contact hole opening to be created in the insulator layer, exposing a portion of the top surface of the conductive region. A chemical mechanical polishing procedure, or a combination chemical mechanical—wet organic clean procedure, is then employed to remove the photoresist shape without forming a silicon oxide layer comprised with a substoichiometric silicon oxide component, on the top surface of the conductive region exposed in the contact hole. A pre-clean procedure, removing any stoichiometric silicon oxide from the top surface of the exposed conductive region, is followed by deposition of a metal layer. A subsequent anneal procedure results in the formation of the metal silicide layer, on the exposed top surface of the conductive region, followed by the selective removal of unreacted metal, located on non-conductive, or insulator surfaces.
REFERENCES:
patent: 6090707 (2000-07-01), Sharan et al.
patent: 6140234 (2000-10-01), Uzoh et al.
patent: 6300201 (2001-10-01), Shao et al.
Ackerman Stephen B.
Everhart Caridad
Lee Calvin
Saile George O.
Vanguard International Semiconductor Corporation
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