Semiconductor device manufacturing: process – Repair or restoration
Reexamination Certificate
2001-05-29
2002-09-24
Graybill, David E. (Department: 2827)
Semiconductor device manufacturing: process
Repair or restoration
C438S015000, C438S017000, C438S115000, C438S662000
Reexamination Certificate
active
06455331
ABSTRACT:
FIELD OF THE INVENTION
The present invention generally relates to thin film repair and, more particularly, to the repair of thin film wiring using top-surface-metallurgy (or TSM) repair schemes.
BACKGROUND OF THE INVENTION
The repair of thin film wiring using TSM repair lines is well known. In the conventional repair process, a defective electrical wiring net, used to connect components on a circuit board, is disconnected from its internal wiring through specialized locations located at the “C4” joining pads. (“C4” means the Controlled-Collapsed-Chip-Connection technique used to connect semiconductor chips to the holes or vias between layers of a circuit board.) The net is reconstructed with equivalent electrical performance by connecting the X-Y grid of the repair lines on the top surface to the required C4 pads,matching the timing of the original net.
The reconstruction of the net is normally accomplished by joining the segments of the repair lines with individual gold slugs bonded to the TSM repair lines through a lasersonic bonding methodology. The gold slugs interconnect specific X and Y repair line segments to rebuild the net topography.
FIG. 1
illustrates a portion of a conventional multi-chip module (MCM) before repair. In
FIG. 1
, C4 connection
10
is connected to net
12
at via
14
. X repair line
16
and Y repair lines
18
,
20
are part of the top layer. Y repair lines
18
,
20
are connected by Y repair line subway
22
using vias
24
,
26
. Vias
14
,
24
,
26
connect to down levels. C4 connection
10
has a repair elbow
28
and a bond site
30
.
The reconstruction of the net during a conventional repair process is normally accomplished by joining the segments of the repair lines with individual gold slugs bonded to the TSM of the repair through conventional lasersonic bonding processes. The gold slugs interconnect specific X and Y repair line segments to rebuild the net topography.
FIG. 2
is a plan view of the portion of the device shown in
FIG. 1
after the conventional repair process. (
FIG. 3
is a cross-sectional view taken along the line
3
—
3
of
FIG. 2.
) When a short is found in net
12
, it is completely disconnected from the circuit using external delete
32
between C4 connection
10
and via
14
. This process is repeated at every other C4 connection location for net
12
. To replace this deleted net, a portion of X repair line
16
and Y repair lines
18
,
20
must be used. Conventionally, X repair line
16
and Y repair lines
18
,
20
are cut using deletes. Then C4 connection
10
is connected to X repair line
16
using gold slug
34
, and X repair line
16
is connected to Y repair line
20
using gold slug
36
.
One drawback of the conventional repair process illustrated in
FIGS. 1-3
is that a relatively large number of repair lines are consumed for nets with multiple segments. As illustrated in
FIG. 2
, an X repair line and a Y repair line were necessary to replace net
12
. This results in fewer nets being repairable. This drawback is illustrated in
FIG. 4
, which shows two nets. C4 connection
10
(a signal connection) is part of net
12
; C4 connection
40
(also a signal connection) is part of the second net
42
. Power-ground C4's
44
,
46
are also shown. Because most defective nets run in the same general direction on the device, they require the use of the same top-surface repair lines. In such a case a part might be lost due to “unroutability,” defined as insufficient repair lines to meet the repair requirements. Only one of the two nets illustrated in
FIG. 4
can be repaired using the conventional process because both need access to X repair line
16
.
The conventional gold lasersonic bonding technique works well for planarized thin film structures. In the new generation of multilayer thin film products using “CMOS” or Complementary Metal-Oxide-Semiconductor systems, however, the thin film structures are not planarized. The surface topography caused by the non-planarized films significantly reduces the effectiveness of the lasersonic bonding technique. This reduced effectiveness increases the risk of reliability defects associated with the bonds and reduces the yield of substrates which require a large number of bonds. This problem has effectively limited the number of defects that may be repaired and creates unnecessary yield loss. On some products, the yield loss may be as high as fifteen percent.
In view of the shortcomings of the prior art, a new process and system are needed to improve the repair process of thin film products. One approach, titled “Method for Repairing Defective Electrical Connections on Multi-Layer Thin Film (MLTF) Electronic Packages and the Resulting MLTF Structure,” is the subject of U.S. patent application Ser. No. 08/577,677, filed on Dec. 21, 1995. Provided below is another approach.
SUMMARY OF THE INVENTION
To meet this and other needs, and in view of its purposes, the present invention is directed to a device repair process. The process includes removing a passivation polyimide layer. The passivation polyimide layer is removed using a first-half ash followed by a second-half ash. The device is rotated during the second-half ash. The device is then cleaned using sodium hydroxide (NaOH) and a subsequent light ash is implemented. After the passivation polyimide layer is removed, a seed layer is deposited on the device. A photoresist is formed on the seed layer and bond sites are formed in the photoresist. Repair metallurgy is plated through the bond sites. The bond sites are plated by coupling the device to a fixture and applying the current for plating to the fixture. After plating, the residual seed layer is removed and a laser delete process is implemented to disconnect and isolate the nets.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, but are not restrictive, of the invention.
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Desai Kamalesh S.
Franklin Peter A.
Kaja Suryanarayana
Kelly Kimberley A.
Lee Yeeling L.
Graybill David E.
International Business Machines - Corporation
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