Semiconductor device manufacturing: process – With measuring or testing
Reexamination Certificate
2001-11-14
2002-07-23
Meier, Stephen D. (Department: 2822)
Semiconductor device manufacturing: process
With measuring or testing
C438S476000, C438S471000, C438S928000, C438S974000
Reexamination Certificate
active
06423556
ABSTRACT:
TECHNICAL FIELD
The present invention relates to semiconductor processing, and more particularly to measuring impurity concentrations introduced into silicon wafers from processing equipment such as conventional furnaces and rapid thermal processing (RTP) machines.
BACKGROUND OF THE INVENTION
Manufacturers of semiconductor integrated circuits are constantly striving to increase the performance and reduce the price of their products. One way to both increase the performance and reduce the price of an integrated circuit is to reduce the size of the integrated circuit. By reducing the size of a circuit, more circuits can be manufactured on a single semiconductor substrate, thereby reducing the unit cost of the circuit. In addition, reducing the size of a circuit typically increases its speed and reduces its power consumption.
One problem manufacturers encounter in attempting to reduce the size of their integrated circuits involves impurity contamination. For example, metallic contamination of a semiconductor substrate can cause excess leakage currents, poor voltage breakdown characteristics, and reduced minority carrier lifetimes. As the size of an integrated circuit decreases, the detrimental effect of impurities in the semiconductor is magnified. For extremely small circuits, even relatively low levels of contamination can be sufficient to render the circuit inoperative. Therefore, manufacturers take extraordinary measures to prevent impurity contamination in their manufacturing processes.
To optimize their contamination control practices, manufacturers often need to measure the concentration of impurities in their semiconductor substrates at various points during the manufacturing process. This allows manufacturers to determine which area(s) of their process are causing impurity contamination problems. However, as the levels of impurity concentration have decreased to very low levels, it has become more and more difficult to measure the impurity concentration. Indeed, semiconductor industry standards such as the National Semiconductor Roadmap call for impurity concentrations to be as low as 10
10
cm
−3
in the near future. Since the atomic density of a typical semiconductor substrate such as silicon is approximately 10
22
cm
−3
, impurity concentrations of 10
10
cm
−3
can be very difficult to measure even with sophisticated measurement equipment.
For example, copper (Cu) and nickel (Ni) are two metallic impurities found in semiconductor substrates. Impurity concentrations of copper and nickel in heavily boron-doped substrates typically are measured by techniques such as Total Reflection X-Ray Fluorescence (TXRF) and Secondary Ion Mass Spectroscopy (SIMS), etc. The minimum detection limit of copper is approximately 10
17
cm
−3
by TXRF (measured near the surface of the substrate) and approximately 10
15
cm
−3
by SIMS. As a result, manufacturers have begun to search for new ways to measure impurity concentrations in semiconductor substrates.
As acceptable levels of metallic impurities are continually being reduced and new methods for measuring impurity concentrations are developed, manufacturers must understand and control the impurity concentrations of processes used to manufacture semiconductor substrates.
One such area of concern is the furnace used for heat treatment of the substrates. During heat treatment, one or more semiconductor substrates are placed on a holder made of quartz, and placed within a chamber, also typically made of quartz or graphite. The heat treatment chamber is sealed with a pressure seal that allows for pressure reduction during the process, as desired. The temperature is then elevated to the desired temperature, and maintained for a desired length of time. The elevated temperature and time are dependent upon many factors, depending on the goal of the treatment process. During the entire heat treatment cycle, a gas such as argon, oxygen, hydrogen, or nitrogen is passed over the semiconductor substrates. If any contaminants are present in any of the quartz or graphite parts, pressure seals, or the process gas, these contaminants can easily migrate into the semiconductor substrate, especially at elevated temperatures. It is therefore very important to use appropriate equipment components and gases that have low concentrations of impurities. Unfortunately, no reliable method currently exists to determine the concentration of metallic impurities is the various components and process gases used in performing heat treatment. There is a need, therefore, for a reliable method of determining and monitoring the contamination levels of equipment used for heat treatment to support and assist in circuit size reduction.
SUMMARY OF THE INVENTION
The invention provides a method for evaluating the concentration of impurities within a heat treatment process by measuring the concentrations of impurities of a semiconductor wafer on which a heat treatment process has been performed. The method includes running a representative heat treatment cycle with a monitor wafer having contamination levels below detection limits or at a low and known level placed in a heat treatment furnace. At least a portion of the contaminants that have been transferred to the semiconductor wafer from the heat treatment process wafer are drawn together and measured.
In one embodiment of the invention, a gettering layer is formed on one surface of the semiconductor wafer to getter impurities that have been transferred from the heat treatment process. The impurity concentration of the gettering layer is then measured and the results are used to determine at least a range of impurity concentrations contained within the heat treatment equipment and process gases.
In another embodiment, an oxide layer is formed on at least one surface of the semiconductor wafer, such as silicon dioxide (SiO
2
). A gettering layer is then formed on the surface of the oxide layer, followed by the heat treatment process to be analyzed. The impurity concentration of the gettering layer is then measured and the results are used to determine at least a range of impurity concentrations contained within the heat treatment equipment and process gases. The oxide layer is used as a diffusion barrier for nickel (Ni) and iron (Fe) contaminants, effectively preventing any contaminants found within the substrate wafer from being gettered into the gettering layer. This, in turn, limits the source of nickel and iron impurities to the heat treatment equipment and process itself.
In yet another embodiment, an oxynitride layer (SiO
x
N
y
) is formed on at least one surface of the wafer. A gettering layer is then formed on the surface of the oxynitride layer, followed by the heat treatment process to be analyzed. The impurity concentration of the gettering layer is then measured and the results are used to determine at least a range of impurity concentrations contained within the heat treatment equipment and process gases. The oxynitride layer is used as a diffusion barrier for copper (Cu), nickel (Ni), and iron (Fe) contaminants, effectively preventing any contaminants found within the substrate wafer from being gettered into the gettering layer. This, in turn, limits the source of copper, nickel, and iron impurities gettered within the gettering layer to the heat treatment equipment and process itself.
REFERENCES:
patent: 5233191 (1993-08-01), Noguchi et al.
patent: 6174740 (2001-01-01), Ohta et al.
patent: 763735 (1997-03-01), None
patent: 05-286795 (1993-11-01), None
patent: 08-340008 (1996-12-01), None
patent: 10-223713 (1998-08-01), None
Anderson Douglas G.
Koveshnikov Sergei V.
Anderson Douglas G.
Meier Stephen D.
Novacek Christy
SEH America Inc.
LandOfFree
Method for evaluating impurity concentrations in heat... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for evaluating impurity concentrations in heat..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for evaluating impurity concentrations in heat... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2846919