Electrical computers and digital processing systems: processing – Architecture based instruction processing – Stack based computer
Reexamination Certificate
1999-06-30
2002-03-26
Pan, Daniel H. (Department: 2183)
Electrical computers and digital processing systems: processing
Architecture based instruction processing
Stack based computer
C712S228000, C712S227000, C712S225000, C712S248000, C712S216000, C711S132000
Reexamination Certificate
active
06363474
ABSTRACT:
FIELD OF THE INVENTION
The present invention generally relates to data processing systems, and more specifically to duplicating registers in order to minimize register reloading during a context switch.
BACKGROUND OF THE INVENTION
Computer processors typically include in their instruction sets instructions for changing processor state. For example, many computer architectures include instructions to change from user mode to supervisory mode, and back. Indeed, without this sort of instruction, it is highly problematic whether architecture can do an adequate job in protecting one user from another, or the operating system from users.
In a modem operating system (OS), there are well-defined tasks that must be accomplished when an operating system dispatches user tasks and programs to execute, and when the operating system receives control back after such execution. Some of these tasks including loading and storing general-purpose registers and segment registers.
Some architectures, especially Reduced Instruction Set Computer (RISC) architectures, utilize long, often repeated, sequences of code to load and store these general purpose and segment registers. As this function is repeated whenever control is transferred to or received from a user program, this approach of utilizing long, often repeated, sequences of code can be quite costly. For that reason, specialized instructions have been added to some architectures to expedite this entire process. For example, the GCOS® 8 architecture, owned by the assignee of this invention, includes a CLIMB instruction utilized to change from supervisory mode to user mode, and back. The CLIMB family of instructions performs all actions necessary to change from supervisory mode to user mode, and back in a single instruction.
Unfortunately, execution of such complex state changing instructions as the CLIMB can be quite expensive in terms of processor cycles required for execution. This is especially important in high volume transaction environments where it is necessary to switch back and forth, to and from supervisory mode to user mode quite often. It would thus be extremely useful if the number of computer cycles could be reduced when executing a complex state change instruction.
One place where a significant amount of time is spent during execution of complex state change instructions is in loading and restoring all of the registers required. This is typically done in a serial fashion, loading or storing one register at a time. This can be quite expensive in terms of processor cycles. It would thus be advantageous for a computer architecture to provide a mechanism for eliminating at least some register loading and/or storing.
REFERENCES:
patent: 5241654 (1993-08-01), Kai et al.
patent: 5241679 (1993-08-01), Nakagawa et al.
McCulley Lowell
Ryan Charles
Yoder Ronald
Bull HN Information Systems Inc.
Pan Daniel H.
Phillips J. H.
Solakin J. S.
LandOfFree
Process switching register replication in a data processing... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Process switching register replication in a data processing..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process switching register replication in a data processing... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2843782