Coating apparatus – Gas or vapor deposition – With treating means
Reexamination Certificate
1999-05-19
2002-01-01
Bueker, Richard (Department: 1763)
Coating apparatus
Gas or vapor deposition
With treating means
C118S729000, C118S500000
Reexamination Certificate
active
06334404
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a method and apparatus for semiconductor processing, and more particularly, relates to a method and apparatus for reducing particle contamination on wafers within a semiconductor processing chamber.
2. Description of the Prior Art
A reaction chamber is a cornerstone of the semiconductor manufacturing process. Common processes such as oxidation, diffusion, deposition, and annealing are performed within a chamber.
In a reaction chamber that is used during a semiconductor process, a risen of dust occurs due to switches between different inflow gases and or changes in the inflow rate. The dust produced mainly comes from the following situations. First of all, after a long period of chamber usage and under a numerous cycle of temperature rising and falling within the chamber. Particles are produced by peelings due to thermal reactions inside a tube, which is a component of the chamber. Moreover, particles can be generated as the remains of a reactant or a sub-product in the reaction of reacting gases, by the surrounding environment, by the processing equipment or by the handling of manufacturing personnel.
A large percentage of the yield losses can be contributed to contamination by the particles described in the above paragraph, which pollutes the wafers during a semiconductor process. A Typical problem and harmful effect caused by particle contamination on a wafer is the poor adhesion of deposited layers. Contamination of particles not only reduces the yield percentage and also downgrades the reliability of the devices been built. For instance, particle contamination can cause a device to fail by improper defined patterns, by creating unpredictable surface topology, by inducing leakage current through insulating layer, or otherwise reducing the device lifetime.
It is generally recognized that a particle contamination exceeding one-half of a minimum feature size on a device has the potential of causing a fatal defect, a defect that might cause a total failure within a device. A defect of smaller size may also be fatal if it is located in a critical area, for instance, a particle contaminant in the gate oxide layer of a transistor.
The problem of particle contamination on wafers is particularly more serious for a LPCVD reaction chamber. After a serial step of reaction process within the LPCVD reaction chamber, the unreacted gases are drawn out till a very low pressure environment has been reached. Subsequently, a breaking up of the vacuum is introduced and an atmospheric pressure has been restored within the chamber. At the same time, turbulent flows are generated inside the chamber and an even greater dust movement has been risen within the LPCVD reaction chamber.
FIG. 1
shows in schematic form of a simplified conventional horizontal tube LPCVD reaction chamber
10
. Providing a quartz tube
11
having two openings
12
and
13
, where one of them is a gas inlet and the other is a gas outlet. In the drawing, depicting the gas inlet
12
and the gas outlet
13
. The chamber
10
further comprises a wafer boat carrier
14
having a quartz gate
15
attached to it and a wafer boat
16
placed on top of the wafer boat carrier
14
. Processing wafers
17
are placed inside the wafer boat
16
. A turbulent flow
18
causes a risen of charged particles
19
within the quartz tube
11
, a large portion of those charged particles will then been attracted to those wafers
17
in process. The result of this would be a contamination of particles on wafers.
It is therefore the main objective of the present invention is to provide a method and apparatus for reducing or even preventing particle contamination on wafers. Not only this, the present invention only requires a few addition of components to the existing processing equipment and it does not require the use of additional chemicals or gases.
SUMMARY OF THE INVENTION
In accordance with the present invention, an improved semiconductor furnace system having an electrostatic wafer boat carrier is provided for repulsing dust particles away from the wafers inside a reaction chamber that substantially reduces particle contamination on wafers in process. The idea of the present invention is applicable toward any type of semiconductor furnace system, including any CVD reactor and any PVD reactor. However, due to the simplicity in structure and drawing,
FIG. 2
shows a preferred embodiment of the present invention, the main apparatus of an improved LPCVD system.
The improved LPCVD system that reduces particle contamination on wafers comprises a reaction chamber adapted to receive a reactant gas mixture from a gas inlet and having wafers to be processed. The reaction chamber itself comprises a quartz tube and a quartz gate attached to a wafer boat carrier. A dielectric layer formed and covering a surface of the wafer boat carrier. A numerous number of wafer boats located on top of the wafer boat carrier and having wafers placed inside the wafer boats.
Apart from the reaction chamber, the improved LPCVD system further comprises a few crucial components of the present invention, an electrostatic generator for producing either positive or negative charges, a conductive ring attached to the wafer boat carrier and outside the quartz tube. And a conducting wire linking in between the conductive ring and the electrostatic generator for transporting charges generated from the electrostatic generator to the wafer boat carrier.
The present invention is also directed to a method for reducing particle contamination on wafers in process. The method comprises an apparatus and an operating procedure. The apparatus required is the improved semiconductor furnace system, for example the improved LPCVD system described in the previous paragraph. The operating procedure comprises, providing the quartz gate attaches to the quartz tube and a process reaction takes place within the sealed tube. Next, turning on the electrostatic generator after a reacting process in generating a first polarity charge to repulse particles with the same polarity charge.
FIG. 2
shows positive charges have been generated in repulsing positive particles away from the wafers. Sequentially, pulling out the wafer boat carrier from the quartz tube. And finally, turning off the electrostatic generator before removing the wafers away from the wafer boat carrier.
REFERENCES:
patent: 4962727 (1990-10-01), Harada
patent: 5102496 (1992-04-01), Savas
patent: 5565179 (1996-10-01), Douglas
patent: 6045619 (2000-04-01), Tai et al.
Liu Tien-Jui
Tseng Ling-Hsin
Bacon & Thomas
Bueker Richard
United Microelectronics Corp.
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