Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...
Reexamination Certificate
2001-06-20
2002-04-09
Riley, Shawn (Department: 2838)
Electricity: power supply or regulation systems
Output level responsive
Using a three or more terminal semiconductive device as the...
C323S284000
Reexamination Certificate
active
06369558
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a switching regulator and, particularly, to a switching regulator for use in a D.C. power source circuit of an electronic device, which is capable of restricting overshoot of an output voltage of the D.C. power source at a time when the switching regulator is actuated to allow the D.C. power source circuit to generate a desired stabilized power source voltage substantially simultaneously with a turning ON of the power source circuit, while preventing the power source circuit from oscillating.
2. Description of the Prior Art
In jorder to efficiently obtain a stabilized power source voltage of a conventional power source circuit of an electronic device such as a portable audio device, a portable personal computer, a PHS, a portable telephone set or the like, the power source circuit utilizes a switching regulator.
FIG. 3
is a circuit diagram of an example of a conventional switching regulator. In
FIG. 3
, a switching regulator
10
includes an error amplifier (Err)
11
, a reference voltage generator circuit
12
, a PWM pulse generator circuit
13
, a driver
14
, a switching circuit
15
and a voltage dividing resistor circuit
17
. The switching circuit
15
is composed of a P channel MOSFET Q
1
having an emitter connected to an input power source line +Vcc and a Schottky diode D connected between the P channel MOSFET Q
1
and ground GND.
A power capacitor C has one terminal connected to an output terminal
16
of the switching regulator
10
and the other terminal grounded (GND). An inductor L is connected between the output terminal
16
and a junction between the MOSFET Q
1
and the Schottky diode D. An inductance of the inductor L is in the order of 10 &mgr;H and a capacitance of the capacitor C is about 150 &mgr;F. A voltage dividing resistor circuit
17
for detecting a voltage of the output terminal
16
has one terminal connected to the output terminal
16
and the other terminal grounded (GND). A voltage Vs detected by the voltage dividing resistor circuit
17
is fedback to one of input terminals of the error amplifier
11
. The voltage Vs detected by the voltage dividing resistor circuit is compared by the error amplifier
11
with a reference voltage Vref applied to the other input terminal of the error amplifier
11
and an error voltage VE between the detected voltage Vs and the reference voltage Vref is inputted to the PWM pulse generator circuit
13
as an error detection signal. The PWM pulse generator circuit
13
is usually constructed with a comparator (COM)
13
a
and a sawtooth wave generator circuit
13
b.
In the PWM pulse generator circuit
13
, a sawtooth voltage from the sawtooth wave generator circuit
13
b
is compared with the error voltage VE so that the sawtooth wave is sliced by the error voltage VE to produce a PW pulse having width determined by the error voltage VE. The PMW pulse thus generated is inputted to the driver
14
. The driver
14
drives the MOSFET Q
1
to turn it ON and OFF for a time period corresponding to the width of the PWM pulse to generate a reduced voltage, or a boosted voltage obtained by fly-back pulse when the switching regulator is of the booster type, which is applied to the output terminal
16
through the inductance L.
Incidentally, the Schottky diode D is a flywheel diode for returning current flowing from the inductance L when the MOSFET Q
1
is turned OFF to the inductance L.
With this construction, the MOSFET Q
1
is ON-OFF controlled by the driver
14
such that the voltage Vs obtained by the voltage dividing resistor circuit
17
becomes coincident with the reference voltage Vref. Therefore, the output voltage of the MOSFET Q
1
at the output terminal
16
is stabilized to a constant voltage Vo.
The voltage dividing resistor
17
for detecting the output voltage of the switching regulator is composed of a resistor R
1
connected to the output terminal
16
of the switching regulator, a resistor R
2
connected in series with the resistor R
1
and a speed-up circuit. The speed-up circuit includes a CR time constant circuit
17
a
for setting a gain and functions to reduce a time period from a time at which the switching regulator
10
is started to a time at which the operation of the switching regulator enters into a voltage stabilizing mode. The CR time constant circuit
17
a
is composed of a series circuit of a resistor R
3
and a capacitor C
1
and is connected in parallel to the resistor R
1
of the voltage dividing resistor circuit
17
. The CR circuit
17
a
functions to increase a gain (voltage dividing ratio) of a rising portion of the detection voltage Vs to thereby rise the detection voltage Vs at high speed in an initial operating stage of the switching regulator. As a result, the output voltage is increased to the aimed voltage Vo rapidly.
At this time, an impedance determined by a time constant given by the resistor R
3
and the capacitor C
1
is connected in parallel to the resistor R
1
, so that the switching regulator operates at a response speed obtained thereby. Therefore, the time required to obtain the aimed output voltage Vo is shortened.
Incidentally, Lo depicts a load and a capacitance of the capacitor C
1
is about 5.6 &mgr;F. When the operation of the switching regulator becomes the voltage stabilizing state (normal state), a terminal voltage of the capacitor C
1
when charged is substantially maintained at the terminal voltage of the resistor R
1
. It is usual that the resistor R
3
has a value smaller than a half of the value of the resistor R
1
and the impedance of the series circuit of the resistor R
3
and the capacitor C
1
at the starting time of operation of the switching regulator is smaller than the half value of the resistor R
1
.
However, with the provision of the CR time constant circuit
17
a,
there is a problem of occurrence of overshoot in a rising portion of the output voltage of the power source. In order to solve the overshoot problem, the time constant of the CR time constant circuit
17
a
is increased by increasing the capacitance of the capacitor C
1
, which is generally referred to as the “speed-up capacitor”, to relax a voltage change of the rising portion of the detection voltage Vs. However, when the capacitor C
1
having increased capacitance is used, the phase advance is increased with increase of the switching frequency of the switching regulator, so that there is another problem of oscillation of the switching regulator.
In order to solve the circuit oscillation problem, it is usual that the effective width of the output pulse of the PWM pulse generator circuit
13
at the starting time of the switching regulator is increased gradually or an amplifier having a low operating speed is used as the error amplifier
11
. In the former case, there is a problem that the size of the control circuit at the starting time of the switching regulator becomes large and, in the latter case, there is a problem that the high response speed to the output voltage regulation is lost.
SUMMARY OF THE INVENTION
The present invention was made to solve the above described problems of the conventional technique and an object of the present invention is to provide a switching regulator capable of restricting an overshoot of an output voltage of the switching regulator at a starting time thereof and of generating a predetermined, stabilized power source voltage immediately after a power source is turned ON, while preventing oscillation of the power source circuit.
In order to achieve the above object, a switching regulator according to the present invention, in which a portion or a whole portion of a voltage outputted from an output terminal of a D.C. power source to a load through a voltage divider circuit connected in parallel to the load is fed back to one of inputs of an error amplifier of the switching regulator, a predetermined constant voltage is applied to the other input of the error amplifier, the voltage +Vcc of the D.C. power source is switched by a transistor accordin
Mattingly Stanger & Malur, P.C.
Riley Shawn
Rohm & Co., Ltd.
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