Low current floating gate programming with bit-by-bit verificati

Details Low current floating gate programming with bit-by-bit verificati Low current floating gate programming with bit-by-bit verificati

1997-03-06

1998-07-28

Le, Vu A.

Static information storage and retrieval

Floating gate

Particular biasing

36518511, 36518513, G11C 1606

Patent

active

057870390

ABSTRACT:
A system for programming arrays of floating gate memory cells reduces programming current requirements, and reduces wordline and bitline stress during programming. A word-to-be-programmed into a floating gate memory array is divided into a plurality of smaller subwords. Only one subword is programmed at a time, thereby reducing programming current requirements. Additionally, subwords which are successfully programmed are not reprogrammed even if bits in other subwords do not program properly. This creates less wordline stress than previous systems which program an entire word at once, thereby requiring subwords which program successfully to be reprogrammed along with subwords which fail to program. Finally, within each subword only those bits which failed to program are reprogrammed, thereby reducing bitline stress during reprogramming for those bits which were successfully programmed.

REFERENCES:
patent: 5053990 (1991-10-01), Kreifels et al.
patent: 5163021 (1992-11-01), Mehrotra et al.
patent: 5172338 (1992-12-01), Mehrotra et al.
patent: 5263003 (1993-11-01), Cowles et al.
patent: 5297096 (1994-03-01), Terada et al.
patent: 5317535 (1994-05-01), Talreja et al.
patent: 5327383 (1994-07-01), Merchant et al.
patent: 5357463 (1994-10-01), Kinney
patent: 5379413 (1995-01-01), Hazen et al.
patent: 5396468 (1995-03-01), Harari et al.
patent: 5400286 (1995-03-01), Chu et al.
patent: 5414664 (1995-05-01), Lin et al.
patent: 5446690 (1995-08-01), Tanaka et al.
patent: 5491809 (1996-02-01), Coffman et al.
patent: 5526309 (1996-06-01), Jinbo
patent: 5532960 (1996-07-01), Lin et al.
patent: 5541886 (1996-07-01), Hasbun
patent: 5559956 (1996-09-01), Sukegawa
patent: 5636162 (1997-06-01), Coffman et al.
patent: 5675536 (1997-10-01), Sim

Affiliated with

Also associated with

Rating

Low current floating gate programming with bit-by-bit verificati does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Low current floating gate programming with bit-by-bit verificati, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Low current floating gate programming with bit-by-bit verificati will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-28388